Normally-off dual gate AlGaN/GaN MISFET with selective area-recessed floating gate

Ahn, Ho−Kyun; Kim, Zin-Sig; Bae, Sung-Bum; Kim, Hae-Cheon; Kang, Dong Min; Kim, Sung-Il; Lee, Jongmin; Min, Byung Gil; Yoon, Hyoung-Sup; Lim, Jong−Won; Kwon, Yong-Hwan; Nam, Eun Soo; Park, Hyung-Moo; Lee, Jung‐Hee

doi:10.1016/j.sse.2014.03.005

Cited by 18 publications

(8 citation statements)

References 15 publications

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“…The electrical field distribution of the RSGDG and the RTGDG devices performed with the device simulator Silvaco ATLAS demonstrates in Figure b. The improvement of the gate leakage using recessed trapezoidal groove dual‐gate architecture is, thus, contribution to the suppression of electrical field distribution and the off‐state leakage …”

Section: Resultsmentioning

confidence: 99%

The Recessed Trapezoidal Groove Dual‐Gate AlGaN/GaN E‐Mode Transistor by Using Depletion Enhancement Effect

Yang

Hou

et al. 2018

Physica Status Solidi (a)

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The recessed trapezoidal groove dual‐gate profile is achieved by the low power CF4 plasma etching based on the principle of ion‐scattering. The recessed trapezoidal groove dual‐gate architecture can increase the lateral broadening of depletion width, yielding the Enhancement‐mode operation. This device demonstrates a threshold voltage of 0.43 V, a maximum drain current of 480 mA mm−1 and a trans‐conductance of 308 mS mm−1. The device exhibits a low off‐state leakage current of ≈10−10 A mm−1 and gate induced drain leakage is effectively improved. An extrinsic current gain cut off frequency of 32 GHz and a maximum oscillation frequency of 65 GHz are deduced. The threshold voltage (Vth) stability of the Schottky gate HEMT is investigated. The recessed trapezoidal groove dual‐gate exhibits a small shift of Vth, which is attributed to the lateral extension of depletion region in the trapezoidal groove dual‐gate structure.

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Section: Resultsmentioning

confidence: 99%

The Recessed Trapezoidal Groove Dual‐Gate AlGaN/GaN E‐Mode Transistor by Using Depletion Enhancement Effect

Yang

Hou

et al. 2018

Physica Status Solidi (a)

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“…16. 14,26,[34][35][36][37][38][39][40][41] The output properties of the Al 2 O 3 /AlN/GaN MISFET are shown in Fig. 17(a).…”

Section: Inserting In Situ Aln Interlayer To Improve Mis-gate Channel...mentioning

confidence: 99%

“…Fig.16. (Color online) Benchmark of V th hysteresis and V th for the stateof-the-art fully recessed-gate E-mode GaN MISFETs 14,26,[34][35][36][37][38][39][40][41]. …”

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confidence: 99%

A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Yang

Yao

et al. 2019

Jpn. J. Appl. Phys.

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Recess structure is one of the main schemes for insulated-gate E-mode GaN transistors. In this work, selective area growth (SAG) is proposed to fabricate damage-free recess-gate device, and related progresses regarding process optimization and structure evolution have been reviewed. Firstly, the SAG process has been optimized by interface separation (conduction interface and regrowth interface) and n-type Si impurity removal to achieve high-quality AlGaN/GaN heterostructure. Compared to the traditional etching method, the feasibility and superiority of SAG scheme are demonstrated for realizing E-mode Al2O3/GaN MISFET with small Vth hysteresis. Then, by inserting an in situ AlN interlayer, the SAG Al2O3/AlN/GaN MISFET yields improved frequency dispersion and gate channel conduction performances. To further enhance the channel conduction, the SAG partially recess-gate Al2O3/AlGaN/GaN MIS-HFET structure is proposed, by which both high Vth and high-field-effect channel mobility have been achieved. Those results indicate that SAG method gives a perspective way for insulated-recess-gate GaN transistors fabrication.

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“…AlGaN/GaN HEMTs using a dual-gate structure are proposed to modulate the threshold voltage without employing any special fabrication techniques such as plasma treatment, recessed gate-head structure, and the addition of a p-GaN gate layer [21]. Also, a floating gate is embedded between the control gate and drain electrode to improve the DC characteristics with low leakage current, high on/off ratio, and breakdown voltage [22]. However, the systematic optimization of dual-gate structures has not been reported for high-power and high-frequency operations.…”

Section: Introductionmentioning

confidence: 99%

Operational Improvement of AlGaN/GaN High Electron Mobility Transistor by an Inner Field-Plate Structure

et al. 2018

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In this study, a high-performance AlGaN/GaN high electron mobility transistor (HEMT) is presented to improve its electrical operation by employing an inner field-plate (IFP) structure. Prior to the IFP structure analysis, we compared the measured and simulated direct current characteristics of the fabricated two-finger conventional T-shaped gate HEMTs. Then, the AlGaN/GaN HEMT with a drain-side field plate (FP) structure was suggested to enhance the breakdown voltage characteristics. The maximum breakdown voltage recorded with a 0.8 µm stretched FP structure was 669 V. Finally, the IFP structure was interfaced with the gate head of the device to compensate the radio frequency characteristics, choosing the optimum length of the drain-side FP structure. Compared to the 0.8 µm stretched FP structure, the IFP structure showed improved frequency characteristics with minimal difference to the breakdown voltage. The frequency variation caused by changing the passivation thickness was also analyzed, and the optimum thickness was identified. Thus, IFP AlGaN/GaN HEMT is a promising candidate for high-power and high-frequency applications.

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Normally-off dual gate AlGaN/GaN MISFET with selective area-recessed floating gate

Cited by 18 publications

References 15 publications

The Recessed Trapezoidal Groove Dual‐Gate AlGaN/GaN E‐Mode Transistor by Using Depletion Enhancement Effect

The Recessed Trapezoidal Groove Dual‐Gate AlGaN/GaN E‐Mode Transistor by Using Depletion Enhancement Effect

A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Operational Improvement of AlGaN/GaN High Electron Mobility Transistor by an Inner Field-Plate Structure

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