Normally‐off GaN MIS‐HEMT using a combination of recessed‐gate structure and CF₄ plasma treatment

Abstract

The combination of a recessed-gate structure and CF 4 plasma treatment was studied to realize a normally-off operation of a AlGaN/GaN metal-insulator-semiconductor high-electronmobility transistor (MIS-HEMT) for power electronics applications. We verified that fluorine ions incorporated with a strong electronegativity increase the threshold voltage (V th ).In addition, CF 4 plasma treatment slightly etches the AlGaN surface as deeply as 25 Å. A fabricated device exhibits a threshold voltage of as high as 2.6 V. Using a combination of gate recess and plasma treatment processes, the device demonstrates a tremendous potential of normally-off AlGaN/GaN MIS-HEMTs for power electronics applications.

Ion-assisted gate recess process induced damage in GaN channel of AlGaN/GaN Schottky barrier diodes studied by deep level transient spectroscopy

“…Many high power transistors [1][2][3][4][5][6] or Schottky diodes 7,8) use a recessed gate geometry in which the gate metals are deposited on an etched surface to position the gate slightly below the surface. The recessed gate structure is very attractive for fabricating normally off high-voltage AlGaN= GaN high-electron mobility transistors (HEMTs) 9) because the gate threshold voltage can be controlled by the etching depth of the recess without significant increase in onresistance characteristics.…”

Step buffer layer of Al0.25Ga0.75N/Al0.08Ga0.92N on P-InAlN gate normally-off high electron mobility transistors

“…The p-type gate [17] and gate-injection GaN-HFETs using a p-type AlGaN gate [18] recoded a threshold voltage of +1 V. In addition, a selectively dry-etched recessed gate with a polarization-charge-compensation δ-doped GaN cap layer technology [19] was recently reported for ensuring high V th controllability. To make normally-off devices more pronounced, a technology which includes a combination of a recessed-gate structure and a CF 4 plasma treatment [20] was reported, and metal-insulatorsemiconductor HEMTs with dual-gate insulators employing a PEALD (plasma-enhanced atomic layer deposition) SiN x interfacial layer and RF-sputtered HfO 2 [21] were investigated. Even though this technology is more attractive than previously mentioned conventional technologies for its comparatively acceptable threshold voltage, it does not fulfill the threshold voltage demand either, which is greater than 2 V, i.e.…”

Monolithic n‐Type Metal–Oxide–Semiconductor Inverter Integrated Circuits Based on Wide and Ultrawide Bandgap Semiconductors

“…The enhancement-mode device is realized by either recess etching, using p-type NiO or p-GaN, or using CF 4 plasma treatment to deplete the 2DEG electrons. [54][55][56][57][58][59][60] This enhancement-mode transistor is used as the load in the zero-Vgs GaN inverter. Zimmermann et al reported an E-D mode GaN inverter with a gain of 8.5 at V DD = 5 V and NMH and NML values of 1.57 and 1.07 V, respectively.…”