Novel LDMOS With Integrated Triple Direction High-k Gate and Field Dielectrics

Abstract

This article presents a novel lateral doublediffused metal oxide semiconductor (LDMOS) with integrated triple direction high-k gate and field dielectrics (HKGF LDMOS). The main feature of the novel HKGF LDMOS is that the top silicon layer is etched to several pillars, and each pillar is surrounded by the high-k dielectric from top and two sides. First, the triple direction high-k dielectric surrounding the channel forms the high-k metal gate structure together with the triple direction metal gate, which decreases the specific ON-resistance (R ON,sp ) and threshold voltage (V TH ) due to the increasing gate dielectric capacitance. Meanwhile, the triple direction gate structure broadens the channel width without enlarging device size, thus increasing the transconductance (g m ) and further decreasing the R ON,sp . Second, the triple direction high-k dielectric surrounding the drift region has strong modulation effect on the electric field and assistant depletion effect on the drift region, leading to the increasing of the breakdown voltage (BV) and decreasing of the R ON,sp . The simulation results indicate that when comparing with the conventional LDMOS, the proposed HKGF LDMOS not only decreases the V TH by 72.7% and R ON,sp by 48.1%, but also increases the g m and BV by 188.2% and 157.6%, respectively. Index Terms-Breakdown voltage, high-k field dielectric, high-k gate dielectric, lateral double-diffused metal oxide semiconductor (LDMOS), specific ON-resistance, triple direction. I. INTRODUCTION T HE lateral double-diffused metal oxide semiconductor (LDMOS) are widely applied in the energy conversion systems. How to obtain a good tradeoff between the specific ON-resistance (R ON,sp ) and breakdown voltage (BV) is one of the main goals in the design of LDMOS [1]-[5]. In recent years, the high-k (HK) dielectric technology has been applied Manuscript

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

“…The HK dielectric material at the gate of INHK-TMOS together with the metal gate forms the high-K metal gate (HKMG) structure, which significantly influences the V TH [20]. The V TH of TMOS is expressed as follows [21]:…”

“…The HK dielectric material at the gate of INHK‐TMOS together with the metal gate forms the high‐ K metal gate (HKMG) structure, which significantly influences the V TH [20]. The V TH of TMOS is expressed as follows [21]: $$$$\begin{equation}V{\mathrm{TH}} = V{\mathrm{FB}} + 2\Phi f + \frac{{\sqrt {2qNa\varepsilon {\mathrm{SiC}}2\left| {\Phi f} \right|} }}{{C{\mathrm{OX}}}}\end{equation}$$$$where V FB represents the flat‐band voltage, Φ f denotes the surface potential, q represents the electric charge, N a is the P‐well doping concentration, ԑ SiC is the permittivity of 4H‐SiC, C ox represents the gate oxide capacitance, and its expression is as follows: $$$$\begin{equation}C{\mathrm{OX}} = \frac{{\varepsilon 0\varepsilon i}}{{T{\mathrm{OX}}}}\end{equation}$$$$where ԑ i is the permittivity of gate oxide dielectric, and T OX is the thickness of gate oxide dielectric.…”

A FIN-LDMOS with Bulk Electron Accumulation Effect

“…Baliga’s Figure Of Merit ( FOM ) is calculated by BV 2 / R on,sp to evaluate the device, where a higher value is better [ 8 , 9 , 10 ]. Many advanced theories and structures have been investigated to increase the FOM of the power devices [ 11 , 12 , 13 , 14 ]. For example, for the BFG LDMOS proposed in [ 11 ], the author made half of the device into a grid, and for the HKGF LDMOS proposed in [ 14 ], the authors distinguished the device drift into three parts, each surrounded by a three-dimensional High-K dielectric, both of which greatly enhanced the control ability of the device and greatly reduced the R on,sp of the device.…”

“…Many advanced theories and structures have been investigated to increase the FOM of the power devices [ 11 , 12 , 13 , 14 ]. For example, for the BFG LDMOS proposed in [ 11 ], the author made half of the device into a grid, and for the HKGF LDMOS proposed in [ 14 ], the authors distinguished the device drift into three parts, each surrounded by a three-dimensional High-K dielectric, both of which greatly enhanced the control ability of the device and greatly reduced the R on,sp of the device. The Enhanced Dielectric layer Field (ENDIF) theory can introduce a higher electric field between the top layer of silicon and the buried oxygen layer, which can obviously enhance BV [ 15 , 16 , 17 ].…”

LDMOS Drift Region With Field Oxides: Figure-of-Merit Derivation and Verification

“…Ever growing commercial applications of LDMOS transistors has attracted much attention in the research community [9]- [11]. Recently, many studies have been experimentally [12]- [14] and numerically [15]- [18] performed on the improvement of LDMOS design and optimization.…”