Novel Ni silicide formed with a Ni/Er/Ni/TiN structure for thermal stable and low contact resistance source/drain in MOSFETs

Abstract

In this paper, Ni silicide formed with a Ni/Er/Ni/TiN structure is proposed, and the thermal stability and electrical properties of the proposed Ni silicide with an Er interlayer in different positions are studied for application to source/drain of MOSFETs. Ni silicide with Ni/Er/Ni/TiN structures showed not only improved thermal stability but also lower sheet resistance than an Er/Ni/TiN structure. Moreover, proposed Ni/Er/Ni/TiN (2/2/ 11/10 nm) structure exhibited great barrier height and low ideality factor similar to the Er/Ni/TiN structure which could reduce the contact resistance between silicide and doped source/drain region. Therefore, proposed silicide using Ni/Er/Ni/TiN (2/2/11/10 nm) structure is promising for MOSFET source/drain due to better thermal stability, low sheet resistance, and excellent electrical properties.

Capacitance–conductance characteristics of Au/Ti/Al2O3/n-GaAs structures with very thin Al2O3interfacial layer

“…Metal/oxide (insulator)/semiconductor field effect transistor (MOSFET) systems are important conventional devices in integrated circuit technology. MOS transistors are also increasingly used in analog applications such as switched capacitor circuits, analog-to-digital converters and filters [1][2][3][4][5][6][7][8][9]. As mentioned by Wu and colleagues [10], the integrated circuit fabrication based on MOSFET relies on thermally grown amorphous SiO 2 as a gate dielectric, and a stable Si:SiO 2 interface offers many important materials and electrical properties such as the excellent electrical insulation and interfacial bonding properties.…”

“…Thus, it is important to evidence the effects of the native oxide and the different defects such as oxygen vacancies and grain boundaries on the electrical and dielectrical properties of MIS or MOS structures [20,21]. The opto-electrical characteristics of MIS structures are controlled mainly by its interface properties [1][2][3][4][5][6][7][25][26][27][28][29][30]. As is well-known, the C-V plot or admittance value differs significantly from that expected for an ideal MIS diode, and thus the performance of the metal oxide/GaAs-based electronic and optical devices is reduced [1][2][3][4][5][6][7][25][26][27][28][29][30].…”

“…The opto-electrical characteristics of MIS structures are controlled mainly by its interface properties [1][2][3][4][5][6][7][25][26][27][28][29][30]. As is well-known, the C-V plot or admittance value differs significantly from that expected for an ideal MIS diode, and thus the performance of the metal oxide/GaAs-based electronic and optical devices is reduced [1][2][3][4][5][6][7][25][26][27][28][29][30]. Therefore, studies on interface properties are essential in the understanding of the electrical properties of the MIS structures, and are especially of technological importance for developing GaAs-based devices [25][26][27][28][29][30].…”