Novel Radiation-Hardened High-Speed DFF Design Based on Redundant Filter and Typical Application Analysis

Abstract

A cell-level radiation hardening by design (RHBD) method based on commercial processes of single event transient (SET) and single event upset (SEU) is proposed in this paper, in which new radiation-hardened D-type flip-flops (DFFs) are designed. An application-specific integrated circuit (ASIC) of a million gates level is developed based on DFFs, and SEU and single event functional interruption (SEFI) heavy-ion radiation tests are carried out. The experimental results show that the new DFF SEU ability is increased by 63 times compared with the DICE-designed DFF, and is three orders of magnitude higher than the redundantly designed DFF. The SEFI ability of the ASIC designed by the new DFF is 2.6 times higher than the circuit hardened by the TMR design.

TAISAM: A Transistor Array-Based Test Method for Characterizing Heavy Ion-Induced Sensitive Areas in Semiconductor Materials

“…For instance, the multiple-node charge collection effect significantly increases heavy ion-induced soft errors [8,9]. Increasing the distance between transistors in layout is a useful hardening method for mitigating soft errors induced by this effect [10][11][12]. However, due to the lack of heavy ion-induced sensitive area data, it is difficult for circuit designers to determine the required increased distance.…”

Radiation-Tolerant Electronics

“…Article [1] discusses the SEU (single-event upset) tolerance of three layout-hardened 28 nm DICE (dual interlocked storage cell) D flip-flops implemented in advanced 28 nm planar CMOS technology. In [2], the authors present a cell-level radiation-hardening-by-design (RHBD) method based on commercial processes, showcasing new radiation-hardened D-type flip-flops (DFF) with highly improved SEU tolerance compared to standard DICE flip-flops even with TMR. Article [3] presents a fully polarity-aware double-node-upset (DNU)-resilient latch.…”