Numerical Analysis of Warpage and Reliability of Fan-out Wafer Level Package

Lee, Mi Kyoung; Jeoung, Jin Wook; Ock, Jin Young; Choa, Sung‐Hoon

doi:10.6117/kmeps.2014.21.1.031

Cited by 4 publications

(1 citation statement)

References 28 publications

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“…Three-dimensional (3D) wafer-level packaging (WLP) is a mainstream advanced packaging technology to meet the various requirements of semiconductor industries, including low cost, low profile, high input/output (I/O), high electrical performances, and high reliability [1,2]. Advanced wafer-level packaging, such as fan-out wafer-level packaging (FOWLP) technology [3,4] and panel-level packaging (PLP) [5], have attracted recent attraction because they provide several advantages, including high I/O, low cost because they eliminate the substrate, and better thermal performance. Among advanced packaging technologies, various 3D integration or interconnection technologies have also been developed, such as through-silicon vias (TSVs) [6], microbumps [7], and solder-capped pillar microbumps [8].…”

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confidence: 99%

Design of New Au–NiCo MEMS Vertical Probe for Fine-Pitch Wafer-Level Probing

Choa

2021

Crystals

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As fine-pitch 3D wafer-level packaging becomes more popular in semiconductor industries, wafer-level prebond testing of various interconnect structures has become increasingly challenging. Additionally, improving the current-carrying capacity (CCC) and minimizing damage to the probe and micro-interconnect structures are very important issues in wafer-level testing. In this study, we propose an Au–NiCo MEMS vertical probe with an enhanced CCC to efficiently reduce the damage to the probe and various interconnect structures, including a solder ball, Cu pillar microbump, and TSV. The Au–NiCo probe has an Au layer inside the NiCo and an Au layer outside the surface of the NiCo probe to reduce resistivity and contact stress. The current-carrying capacity, contact stress, and deformation behavior of the probe and various interconnect structures were evaluated using numerical analyses. The Au–NiCo probe had a 150% higher CCC than the conventional NiCo probe. The maximum allowable current capacity of the 5000 µm-long Au–NiCo probe was 750 mA. The Au–NiCo probe exhibited less contact force and stress than the NiCo probe. The Au–NiCo probe also produced less deformation of various interconnect structures. These results indicate that the proposed Au–NiCo probe will be a prospective candidate for advanced wafer-level testing, with better probing efficiency and higher test yield and reliability than the conventional vertical probe.

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