Numerical modeling of process parameters on RF metrics in FinFETs, junctionless, and gate‐all‐around devices

Lakshmi, B.; Srinivasan, R.

doi:10.1002/jnm.2193

Cited by 7 publications

(4 citation statements)

References 23 publications

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“…From the quantitative perspective, the statistical natures of the output (RF) parameters with respect to geometrical and doping parameters are investigated in detail by performing multiple regression analysis using SPSS . TCAD generated values, and the predicted values extracted from the model are compared to validate the designed model . Figure A‐C shows the correlation graph of TCAD values plotted against the model values for f t , f max and intrinsic gain for both the devices.…”

Section: Resultsmentioning

confidence: 99%

Investigation of geometrical and doping parameter variations on GaSb/Si‐based double gate tunnel FETs: A qualitative and quantitative approach for RF performance enhancement

Shanmuganathan

Balasubramanian

2019

Int J Numerical Modelling

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This paper compares the radio frequency (RF) performance enhancement of GaSb/Si‐based double gate (DG) tunnel field‐effect transistors (TFETs) and DG TFETs with gate‐drain overlap devices using technology computer‐aided design (TCAD) simulations. The geometrical parameters taken under consideration are gate length (Lg), gate oxide thickness (tox), channel thickness (tch), and doping parameters are channel doping (Nch), drain doping (Nd), and source doping (Ns). These parameters are varied to extract the RF parameters, cut‐off frequency (ft), maximum oscillation frequency (fmax), intrinsic gain, and admittance (Y) parameters. DG TFET with gate‐drain overlap offers highest fmax values of 977 GHz for drain doping of 1e20 cm−3. Higher values of output resistance (Ro) results in high intrinsic gain values for DG TFET with gate‐drain overlap. In terms of Y parameters, DG TFET with gate‐drain overlap shows better Y11 and Y22 values compared with DG TFET. A quantitative model as a function of geometrical and doping parameters is modelled for all the RF parameters that validate the simulated values and predicted values.

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Section: Resultsmentioning

confidence: 99%

Investigation of geometrical and doping parameter variations on GaSb/Si‐based double gate tunnel FETs: A qualitative and quantitative approach for RF performance enhancement

Shanmuganathan

Balasubramanian

2019

Int J Numerical Modelling

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“…It can also be inferred from the plot that f max increases with decreasing t ox . Since inversion layer is formed near the drain, the carriers that are driven from source to channel tend to move towards the drain causing reduction of channel resistance at the source side and providing high f max [19,23] . DG TFET with gate-drain overlap offers more f max due to its enhanced f t and reduced g ds .…”

Section: Geometrical Parameter Variationsmentioning

confidence: 99%

Investigation and statistical modeling of InAs-based double gate tunnel FETs for RF performance enhancement

Poorvasha

Lakshmi

2018

J. Semicond.

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In this paper, RF performance analysis of InAs-based double gate (DG) tunnel field effect transistors (TFETs) is investigated in both qualitative and quantitative fashion. This investigation is carried out by varying the geometrical and doping parameters of TFETs to extract various RF parameters, unity gain cut-off frequency (ft), maximum oscillation frequency (fmax), intrinsic gain and admittance (Y) parameters. An asymmetric gate oxide is introduced in the gate-drain overlap and compared with that of DG TFETs. Higher ON-current (ION) of about 0.2 mA and less leakage current (IOFF) of 29 fA is achieved for DG TFET with gate-drain overlap. Due to increase in transconductance (gm), higher ft and intrinsic gain is attained for DG TFET with gate-drain overlap. Higher fmax of 985 GHz is obtained for drain doping of 5 × 1017 cm−3 because of the reduced gate-drain capacitance (Cgd) with DG TFET with gate-drain overlap. In terms of Y-parameters, gate oxide thickness variation offers better performance due to the reduced values of Cgd. A second order numerical polynomial model is generated for all the RF responses as a function of geometrical and doping parameters. The simulation results are compared with this numerical model where the predicted values match with the simulated values.

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“…In addition to the short channel effects, other aspects of the junction-less devices have also been considered. A recent review of the subthreshold behavior is given by Nowbahari et al 31 Several authors have addressed the modeling and simulation of the analog/RF performance of FinFETs [32][33][34][35] as well. The dependence of RF equivalent circuit parameters on fin dimensions, partly a consequence of SCEs, is evident in some of these simulations.…”

Section: Introductionmentioning

confidence: 99%

Three dimensional simulation of short channel effects in junction less FinFETs

Hosseini

Eskandarian

Ghadimi

2021

Engineering Reports

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In this article, n‐channel junction‐less transistors (JLTs) with gate lengths in the range of 20–250 nm, having crystalline‐silicon (c‐Si) and polycrystalline‐silicon (poly‐Si) channels are characterized for the short channel effects (SCEs). The shift of the threshold voltage with the gate length and the drain induced barrier lowering (DIBL) are determined by three dimensional numerical simulations using technology computer aided design (TCAD) software. Conductive channels are considered to be fin like structures surrounded by oxides and gate materials on three sides. The effect of important device parameters are considered. Degradation of SCEs with shortening of the gate length is predicted as expected from two dimensional simulations. In addition, simulations indicate improvements for lower doping. Thinner channels show better DIBL and threshold shift. The fin height dependence is more complicated where undesirable peak in DIBL is observed for mid‐range heights near 200 nm. DIBL sharply drops for lower fin heights but the threshold shift becomes worse. Overall a small gate device of 20 nm with short fins of similar size can be expected to give a threshold shift of less than 30 mV and DIBL about 70 mV/V and, the use of three dimensional dielectric pockets leads to near zero shift of the threshold voltage. The performance of the two material types are comparable.

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Numerical modeling of process parameters on RF metrics in FinFETs, junctionless, and gate‐all‐around devices

Cited by 7 publications

References 23 publications

Investigation of geometrical and doping parameter variations on GaSb/Si‐based double gate tunnel FETs: A qualitative and quantitative approach for RF performance enhancement

Investigation of geometrical and doping parameter variations on GaSb/Si‐based double gate tunnel FETs: A qualitative and quantitative approach for RF performance enhancement

Investigation and statistical modeling of InAs-based double gate tunnel FETs for RF performance enhancement

Three dimensional simulation of short channel effects in junction less FinFETs

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