2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES) 2015
DOI: 10.1109/cases.2015.7324554
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NUVA: Architectural support for runtime verification of parametric specifications over multicores

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Cited by 14 publications
(7 citation statements)
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“…SW-based verification approaches execute additional software for the instrumentation and the verification of target applications. Although those approaches benefit from the expressiveness of programming languages, they typically introduce a significant performance overhead [22] and change the temporal behavior of the application [9]. In contrast, HW-based approaches introduce dedicated monitoring hardware, which is less expressive but minimizes or completely avoids performance overheads.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…SW-based verification approaches execute additional software for the instrumentation and the verification of target applications. Although those approaches benefit from the expressiveness of programming languages, they typically introduce a significant performance overhead [22] and change the temporal behavior of the application [9]. In contrast, HW-based approaches introduce dedicated monitoring hardware, which is less expressive but minimizes or completely avoids performance overheads.…”
Section: Related Workmentioning
confidence: 99%
“…The intra-thread requirements are verified on local monitors and all inter-thread requirements are verified on a single global monitor limiting the scalability of the architecture. In contrast, Nassar et al [22] introduce a nonuniform verification architecture (NVUA) for the verification of a parameterized finite-state automaton. To achieve this goal, it uses a directed acyclic graph (DAG) to organize a population of monitors.…”
Section: Related Workmentioning
confidence: 99%
“…The core of NUVA is a coherent distributed automata transactional memory that efficiently maintains states of a dynamic population of automata checkers organized into a rooted dynamic directed acyclic graph concurrently shared among all processor nodes. NUVA comprises five ingredients: 1) a specification language based on selfreplicating finite automata (SR-DFAs) introduced in [70]; 2) a naturally distributed representation [70], [71] of RV checkers and auxiliary information; 3) decision algorithms; 4) a low-overhead RV architecture; and 5) a specification mining tool called ParaMiner. The distributed RV architecture is the centerpiece, and namesake, of NUVA.…”
Section: ) Asoc Platform With Machine Learning-based Controlmentioning
confidence: 99%
“…Several hardware-based, software monitoring approaches have been proposed, summarized in [5]. TA and LTL are used in many approaches (e.g., P2V), but capture complex temporal ordering of events and not precise time constraints.…”
Section: Introductionmentioning
confidence: 99%
“…Numerous approaches have focused on runtime verification [5], in which the system execution is periodically monitored to verify adherence to a model capturing the system requirements. Common models for defining system requirements include timed automata (TA) [1] and linear temporal logic (LTL) [6], both of which require significant designer effort and expertise to create and suffer from state explosion for large systems.…”
Section: Introductionmentioning
confidence: 99%