Observation of stacking faults from basal plane dislocations in highly doped 4H-SiC epilayers

Mahadik, Nadeemullah A.; Stahlbush, Robert E.; Ancona, Mario G.; Imhoff, Eugene A.; Hobart, Karl D.; Myers-Ward, Rachael L.; Eddy, Charles R.; Gaskill, D. Kurt; Kub, Fritz J.

doi:10.1063/1.3679609

Cited by 63 publications

(40 citation statements)

References 16 publications

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“…The 1SSFs of T1 and T3 had a right-angled corner on the right side, and these two types are the most frequently observed and repo rted. 3,[5][6][7][9][10][11][12][13][14]16,[19][20][21][22] However, the 1SSFs of T2 had a triangular shape with a right-and-left in contrast to T1 and T3. The expansion direction of T2, which was from the surface to the substrate/epilayer interface, was opposite to that of T3.…”

Section: Resultsmentioning

confidence: 94%

“…4 Most previous studies on the expansion of 1SSFs have found that the SSFs originate from two kinds of BPDs: one that had penetrated from the substrate into the epilayer, 5,6 and another that had converted to a threading edge dislocation (TED) around the substrate/epilayer interface during epitaxial growth. 7 In addition, many analyses have been conducted of these 1SSFs, including current/temperature stress testing, [8][9][10][11][12][13][14] calculations, [15][16][17][18] and crystal analysis. [19][20][21][22][23] The BPD detection by photoluminescence (PL) imaging and the use of a buffer layer between the substrate and the epitaxial layer was proposed as a method for controlling 1SSF expansion 4,7,11,24 with the aim of solving the V F degradation issue.…”

Section: Introductionmentioning

confidence: 99%

“…7 In addition, many analyses have been conducted of these 1SSFs, including current/temperature stress testing, [8][9][10][11][12][13][14] calculations, [15][16][17][18] and crystal analysis. [19][20][21][22][23] The BPD detection by photoluminescence (PL) imaging and the use of a buffer layer between the substrate and the epitaxial layer was proposed as a method for controlling 1SSF expansion 4,7,11,24 with the aim of solving the V F degradation issue.…”

Section: Introductionmentioning

confidence: 99%

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Origin and Generation Process of a Triangular Single Shockley Stacking Fault Expanding from the Surface Side in 4H-SiC PIN Diodes

Ota

Nishio

Okada

et al. 2021

J. Electron. Mater.

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A triangular single Shockley stacking fault (1SSF) in 4H-SiC, expanding from the surface to the substrate/epilayer interface, was investigated. The triangular 1SSF was observed during electroluminescence examination of PIN diodes that had line-andspace anodes with open windows. The threshold current density of the 1SSF expansion was comparatively intermediate, and differed from that of a 1SSF that expanded from a basal plane dislocation (BPD) that had penetrated from the substrate into the epilayer, and from that of a 1SSF that expanded from a BPD that had converted into threading edge dislocations (TEDs) at the substrate/epilayer interface. No BPDs or surface damage such as cracks were observed by photoluminescence imaging, synchrotron x-ray topography imaging, or scanning electron microscope imaging near the origin of the expansion region. High-resolution observation using cross-sectional transmission electron microscopy showed that a partial dislocation (PD) was present on the basal plane and two inclined TEDs were present on both sides of the PD. A g•b analysis showed that this dislocation had a Burgers vector of ± (1/3) [1120], and it was estimated to be a combination of a TED-BPD-TED structure with a short BPD before expansion. Therefore, the triangular 1SSF from the surface side can be explained to have expanded from this BPD. Furthermore, considering the possibility of the BPD-TED conversion at the epitaxial growth process, the TED-BPD-TED dislocation was speculated to have formed after epitaxial growth. The perfect control of the forward voltage degradation of 4H-SiC device is thought to be realized by focusing on this type of BPD.

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Section: Resultsmentioning

confidence: 94%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Origin and Generation Process of a Triangular Single Shockley Stacking Fault Expanding from the Surface Side in 4H-SiC PIN Diodes

Ota

Nishio

Okada

et al. 2021

J. Electron. Mater.

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“…BPD conversion at the substrate/epilayer interface is very important for high reliability of SiC power devices as the BPDs buried in the epilayer can still be converted to SFs under current stress and these SFs will extend to the device active layer and degrade the device performance. 19 Approximately 500 BPDs/cm 2 are on the substrate surface and 99% of them are converted in to TEDs 20−22 producing ∼5 BPDs/cm 2 on the epilayer surface, which is still a significant value adversely affecting the epitaxial wafer yield for device fabrication. Thus, 100% conversion at the substrate/epilayer interface for 4°off-oriented substrates is essential to achieve high yield and performance characteristics of SiC devices at the commercial level.…”

Section: Introductionmentioning

confidence: 99%

Basal Plane Dislocation Free Recombination Layers on Low-Doped Buffer Layer for Power Devices

Balachandran

Sudarshan

Chandrashekhar

2017

Crystal Growth & Design

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We report a novel approach to grow BPD-free 4H-SiC device-ready epilayers, where we start by growing a thin low-doped buffer layer (5 × 1015 to 1 × 1016 cm–3, N-type) to achieve 100% BPD conversion, followed by a moderately thick (∼10 μm) higher-doped recombination layer (5 × 1016 to 1.6 × 1017 cm–3, N-type) to ensure that all recombination occurs within a BPD-free region. High doping of the BPD-free recombination layer ensures fast carrier recombination under forward bias, preventing any stacking fault nucleation in the active layer during bipolar device operation. All the individual BPDs in the buffer epilayer are converted to benign threading edge dislocations (TEDs) over a wide range of C/Si ratios (1 to 1.8), introducing a minimal on-resistance of <0.5 mΩ-cm2. 100% BPD conversion occurs due to the controlled and highly anisotropic eutectic etching of the buffer layer which produces narrow sector angle (5°) for the BPD etch pits to enable conversion of the BPDs within ∼1.5 μm of epilayer growth into TEDs, by promoting lateral growth at the narrow sector of BPD etch pits. This technique enables the translation of BPD conversion technology to real high-power bipolar device architectures in applications such as electric vehicles and solar power grid compatibility circuitry.

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“…However, it has been reported that 1SSFs expand from BPDs that converted into TEDs near the interface between the epitaxial layer and the substrate. 12,13,19) In our previous study, the original area of 1SSFs expanded by applying forward current to 4H-SiC p-i-n diodes was observed by transmission electron microscopy (TEM) with high spatial resolution. 20) TEM observation has clarified that 1SSF expands into the substrate when high-density minority carriers are injected into the substrate.…”

Section: Introductionmentioning

confidence: 99%

Influence of basal-plane dislocation structures on expansion of single Shockley-type stacking faults in forward-current degradation of 4H-SiC p–i–n diodes

Hayashi

Yamashita

Senzaki

et al. 2018

Jpn. J. Appl. Phys.

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The origin of expanded single Shockley-type stacking faults in forward-current degradation of 4H-SiC p-i-n diodes was investigated by the stresscurrent test. At a stress-current density lower than 25 A cm %2 , triangular stacking faults were formed from basal-plane dislocations in the epitaxial layer. At a stress-current density higher than 350 A cm %2, both triangular and long-zone-shaped stacking faults were formed from basal-plane dislocations that converted into threading edge dislocations near the interface between the epitaxial layer and the substrate. In addition, the conversion depth of basal-plane dislocations that expanded into the stacking fault was inside the substrate deeper than the interface. These results indicate that the conversion depth of basal-plane dislocations strongly affects the threshold stress-current density at which the expansion of stacking faults occurs.

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Observation of stacking faults from basal plane dislocations in highly doped 4H-SiC epilayers

Cited by 63 publications

References 16 publications

Origin and Generation Process of a Triangular Single Shockley Stacking Fault Expanding from the Surface Side in 4H-SiC PIN Diodes

Origin and Generation Process of a Triangular Single Shockley Stacking Fault Expanding from the Surface Side in 4H-SiC PIN Diodes

Basal Plane Dislocation Free Recombination Layers on Low-Doped Buffer Layer for Power Devices

Influence of basal-plane dislocation structures on expansion of single Shockley-type stacking faults in forward-current degradation of 4H-SiC p–i–n diodes

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