Observation of stacking faults in strained Si layers

Abstract

Defects in strained Si layers grown on relaxed SiGe layers were studied using chemical etching and transmission electron microscopy. Defect densities were measured in strained Si layers formed on SiGe buffer layers grown on bulk Si, as well as silicon–germanium-on-insulator substrates. It is found that, in addition to threading dislocations and dislocation pile ups, stacking faults are present in nearly all of the materials studied. The stacking faults are shown to originate in the relaxed SiGe alloy suggesting that they form during the relaxation of the SiGe layer.

Strain relaxation processes in strained-Si layer on SiGe-on-insulator substrates

“…The fault can be removed, restoring the perfect lattice arrangement behind the dislocation, by the subsequent glide of a/6b112À, which suggests that the other plane defect is also a stacking fault bounded by similar partial dislocation possibly characterized by reverse Burgers vector with respect to the a/6b112À extending from the Si/SiGe interface. Similar plane defects such as stacking faults and micro twins, originating from the underlying Si 1Àx Ge x layer to the strained-Si surface, have been reported for the strained-Si on thermally mixed SGOI substrates [13,14]. The annihilation of stacking faults observed in this work takes place during the epitaxial growth of the strained Si layer.…”

Device structures and carrier transport properties of advanced CMOS using high mobility channels

“…[9][10][11], the relaxation of the SGOI and GOI layers with large area sizes during the Ge condensation has been attributed to the defect or dislocation generation. It has been reported that many misfit dislocations and threading dislocations are generated in lower Ge content [9,10], while the plane defects become more dominant in higher Ge content [11,12]. It has been pointed out, on the other hand, that the density of remaining defects or dislocations is not sufficient to explain the amount of the relaxation [9][10][11].…”

Impact of the H2 bake temperature on the structural properties of tensily strained Si layers on SiGe

“…These lines are most probably the signature of SFs (i.e. {1 1 1} planes of broken or distorted bond extending through the thickness of the sSi film) or misfit dislocations (MDs) at the interface between sSi and SiGe [7][8][9][24][25][26][27]. It seems likely that SFs would be more deleterious to device operation than MDs [28], although the latter have been shown to act as dopant diffusion pipes in bulk nMOS transistors [29].…”