2015
DOI: 10.1117/12.2207432
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OMTF firmware overview

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Cited by 3 publications
(4 citation statements)
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“…Each of these mezzanine boards controls the main board it is connected to using the IPBus protocol [28] over an AXI Chip2Chip bridge. Similarly, Byszuk et al [29] used the AXI Chip2Chip core to bridge IPBus communication between the control and processing FPGAs on the MTF7 board [30]. On the PIxel detector high Luminosity UPgrade (πLUP) board [31], [32], the AXI Chip2Chip core (using SelectIO DDR) is instantiated on both FPGAs to enable communication.…”
Section: Related Workmentioning
confidence: 99%
“…Each of these mezzanine boards controls the main board it is connected to using the IPBus protocol [28] over an AXI Chip2Chip bridge. Similarly, Byszuk et al [29] used the AXI Chip2Chip core to bridge IPBus communication between the control and processing FPGAs on the MTF7 board [30]. On the PIxel detector high Luminosity UPgrade (πLUP) board [31], [32], the AXI Chip2Chip core (using SelectIO DDR) is instantiated on both FPGAs to enable communication.…”
Section: Related Workmentioning
confidence: 99%
“…The recommended hardware platform for upgraded CMS trigger is µTCA. The OMTF trigger uses the MTF7 board [4,5] containing two Xilinx FPGA chips: XC7VX690T and XC7K70. The OMTF trigger algorithm occupies a significant part (ca.…”
Section: Daq Hardware Platformmentioning
confidence: 99%
“…The part of the system located after the sorter queues works at the clock frequency of 80 MHz. 5 The sorter queues allow grouping the data originating from the same RBX delivered by different links. The "RBX selector" extracts the available RBX descriptor from the RBX circular buffer.…”
Section: Reception Of Data From Sorter Queuesmentioning
confidence: 99%
“…The MTF7 board is an µTCA double width AMC board equipped with two FPGA chips: XC7VX690T and XC7K70, and with an optional memory daughterboard. The OMTF processor occupies the bigger XC7VX690T chip [12].…”
Section: Hardware Platformmentioning
confidence: 99%