This is the first of three papers on the statistical analysis of deep-submicron semiconductor test data for the ITC 2005 Lecture Series. The subject of this paper is variance reduction and the importance of variance reduction in outlier screening. Most of the test-data statistical analysis methods discussed are based on the concept of data driven model building. To obtain significant variance reduction, the common approach for these statistical models is to evaluate a die-by-die estimate of the test response, under the assumption that the die of interest is defect-free. Models of the wafer spatial patterns, single parameter and multi-parameter regressions demonstrate the variety and potential of the concept. Within such a framework, it is shown that significant reductions in the variance of parametric distributions can be obtained with a corresponding improvement in outlier detection.