On-line testing of an off-the-shelf microprocessor board for safety-critical applications

Corno, Fulvio; Prinetto, P.; Rebaudengo, Maurizio; Reorda, M. Sonza; Damiani, M.; Impagliazzo, L.; Sartore, Giovanni

doi:10.1007/3-540-61772-8_38

Cited by 9 publications

(1 citation statement)

References 7 publications

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“…If aliasing effects are negligible, this solution is able to detect any permanent or temporary fault in the memory and in the decoding circuitry [9].…”

Section: Rom Testingmentioning

confidence: 99%

Analysis of Safety Related Architectures

Coccoli

Bondavalli²

The Ninth IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS' 03)

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Fault and Error latency have a great impact on the dependability properties of control systems for critical applications. The replication techniques that are used to build such systems and the degree of replication usually are tailored to the tolerance of one fault (at a time) and result inadequate to cope with latent errors that show up altogether. For this reason, internal error detection mechanisms are coupled with on-line testing activities (diagnostic tests) intended to stress each component of the system so to induce errors and thus to anticipate their detection (reducing latency). Different testing strategies can be adopted on the basis of the element to be tested, the fault to be 'hunted', the characteristics of the system it is applied to. In this work we start from this simple consideration and will elaborate on architectural organizations to ensure safe and available service.

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“…If aliasing effects are negligible, this solution is able to detect any permanent or temporary fault in the memory and in the decoding circuitry [9].…”

Section: Rom Testingmentioning

confidence: 99%