A reduction of gate depletion and DC characteristics in CMOS transistors with poly‐Si/SiGe Gate stack fabricated with local CMOS process is presented. Our local CMOS process uses a single n+ doped, poly‐Si/SiGe gate material. After deposition, both the poly‐Si and the SiGe used as gate layers were implanted by phosphorus ions. The parameters on threshold, sub‐threshold and low frequency noise 1/f of poly‐Si/SiGe CMOS transistors are reported. Our results demonstrate that the shift in threshold voltage due to the presence of Ge in the gate material is apparent from the p‐MOS and n‐MOS device characteristics. The drive current turn‐on in the I‐V characteristics increases compared with conventional CMOS transistors with poly‐Si gate and devices show low 1/f noise which make them promising devices for RF and microwave circuit applications. (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)