On the design of RF spiral inductors on silicon

Abstract

Abstract-This review of design principles for implementation of a spiral inductor in a silicon integrated circuit fabrication process summarizes prior art in this field. In addition, a fast and physics-based inductor model is exploited to put the results contributed by many different groups in various technologies and achieved over the past eight years into perspective. Inductors are compared not only by their maximum quality factors ( max ), but also by taking the frequency at max , the inductance value ( ), the self-resonance frequency ( SR ), and the coil area into account.It is further explained that the spiral coil structure on a lossy silicon substrate can operate in three different modes, depending at first order on the silicon doping concentration. Ranging from high to low substrate resistivity, inductor-mode, resonator-mode, and eddy-current regimes are defined by characteristic changes of max , , and SR . The advantages and disadvantages of patterned or blanket resistive ground shields between the inductor coil and substrate and the effect of a substrate contact on the inductor are also addressed in this paper. Exploring optimum inductor designs under various constraints leverages the speed of the model. Finally, in view of the continuously increasing operating frequencies in advancing to new generations of RF systems, the range of feasible inductance values for given quality factors are predicted on the basis of optimum technological features.

Surface-passivated high-resistivity silicon as a true microwave substrate

“…This, however, brings several technological issues in focus that may form bottlenecks, in particular the considerable losses in the conventional silicon substrates [6]. Currently, resistivities of at most [10][11][12][13][14][15][16][17][18][19][20] cm [low-resistivitysilicon(LRS)]arebeingused.Thiscorrespondsto conductivities that lead to considerable substrate losses and, thus, to excessive attenuation of integrated transmission lines [7] and reduced quality factors of on-chip inductors [8]. III-V-based processes have ideal substrates in that respect, but these lack other important properties such as high thermal conductivity and high and frequency-independent permittivity that qualify silicon as a true microwave substrate [7].…”

A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors

“…Values of L s and L g decrease as the working frequency ω 0 increases. For on-chip integration, both L g and L s are implemented with square spiral inductors for which a quality factor of 3.0 is common [1]. With the simple inductor model in Figure 1(b) for hand calculation, Q L , quality factor of integrated inductor, is defined as…”

“…Generally it is more difficult to design spiral inductor of higher quality or larger inductance [1]. For specific Q Lg , it is seen in Figure 5 that larger P d results in smaller L g and larger L s .…”

“…Integrated spiral inductor is widely used for LNA integration because of its advantages of low cost and ease of process integration [3]. Such inductor, however, exhibits very low quality factor (less than 10) and small effective inductance (less than 20 nH) at Giga-Hz frequencies [1]. Several predictive compact inductor models have been proposed to characterize inductor behavior at frequencies up to 10 GHz to good accuracy [3,10].…”

“…The series resistance of low-quality integrated inductor introduces significant thermal noise and degrades LNA input matching. Particularly, the noise optimization has to consider the fact that series resistance of inductor varies with inductance following specific pattern determined by physical implementation of inductor [1]. Failing to account for the characteristics of spiral inductor in LNA design will result in either considerable error in estimating noise figure and power, or values of inductance and quality factor (Q) that are impossible to realize for on-chip inductor in practice.…”