On the distribution of oxide defect levels in Al2O3 and HfO2 high-k dielectrics deposited on InGaAs metal-oxide-semiconductor devices studied by capacitance-voltage hysteresis

Abstract

In this work, we study oxide defects in various III-V/high-k metal-oxide-semiconductor (MOS) stacks. We show that the choice of a given starting measurement voltage with respect to the MOS flat-band voltage affects the observed capacitance-voltage hysteresis. We discuss how this behavior can be used to study the distribution of oxide defect levels. With the help of comprehensive experimental data, we show that Al2O3 and HfO2 have different hysteresis characteristics related to different oxide defect distributions. In case of an Al2O3/HfO2 bilayer stack with Al2O3 on the channel side (interfacial layer, IL), as the IL thickness reduces from 3 nm to 0 nm, the hysteresis behavior switches from the typical Al2O3 behavior to the one corresponding to HfO2. We link the characteristic behavior of two dielectrics to the defect level distributions inside their respective band-gaps through a simple energy-driven charging model. Based on the experimental data and simulation results, we show that Al2O3, despite having a lower peak defect density as compared to HfO2, shows a very wide, almost continuous distribution of defect levels across and around the InGaAs channel energy band gap. These results explain the often reported poor reliability of III-V devices with Al2O3-based gate stacks.

Analysis of Conduction and Charging Mechanisms in Atomic Layer Deposited Multilayered HfO2/Al2O3 Stacks for Use in Charge Trapping Flash Memories

“…Hysteresis width Δ fb = 2.1 V is obtained for sweeping between −5 V and +10 V, Δ fb = 2.0 V is obtained for sweeping between −5 V and +5 V, and Δ fb = 1.2 V is obtained for sweeping between −5 V and +3 V. Above values are consistent with the literature results obtained for Al 2 O 3 /HfO 2 stacks on In 0.53 Ga 0.47 As [25]. Namely, in [25] it is observed that there is a maximum value of Δ fb between the two Al 2 O 3 /HfO 2 thicknesses ratios of 2.5 nm/3.0 nm and 0.5 nm/2.5 nm higher than or equal to 0.4 V. From our experiment a higher value of 1.2 V is obtained for the thicknesses ratio 1.0 nm/2.5 nm.…”

“…Namely, in [25] it is observed that there is a maximum value of Δ fb between the two Al 2 O 3 /HfO 2 thicknesses ratios of 2.5 nm/3.0 nm and 0.5 nm/2.5 nm higher than or equal to 0.4 V. From our experiment a higher value of 1.2 V is obtained for the thicknesses ratio 1.0 nm/2.5 nm. This value is substantially higher than the value reported for pure HfO 2 [26] under similar conditions.…”

Lack of correlation between C-V hysteresis and capacitance frequency dispersion in accumulation of metal gate/high-k/n-InGaAs metal-oxide-semiconductor stacks

“…39 The MFCV characteristics of the samples are largely consistent with the previous work by Tang et al 21 and those reported in the literature. [11][12][13][14][15]19,20,29 Significant frequency dispersion can be observed from inversion into accumulation. Dispersion in such regions can be explained by the interface traps inside the bandgap 32,40 and the response of border traps, 3,12,14,16 respectively.…”

“…In addition, oxide defects are also accounted for the hysteresis observed on C-V sweeps in trace back mode, and special attention has been drawn toward the energy and spatial distribution of such defects. [18][19][20][21] Surface treatments such as sulfur passivation, 22,23 nitridation, 24 As 2 capping and decapping, [25][26][27][28] hydrogen, 29 oxygen, 30,31 and forming gas anneals (FGA) 21, 23,32,33 have shown diverse levels of success in the passivation of D it and BTs, resulting in different values for the capacitance dispersion with frequency. Dependences on fabrication process have been also observed on the widths of the loops during C-V hysteresis sweeps.…”

“…Dependences on fabrication process have been also observed on the widths of the loops during C-V hysteresis sweeps. 18,19,21,33 Although both C-V hysteresis and C acc dispersion with frequency have been attributed to BTs, a clear correlation has not yet been found between them. Recently, Lin et al 33 provided an insight into this relationship based on their respective dependence on the FGA temperature: the optimal temperature for FGA (450 C) is linked to the lower BT density (N bt ) estimated by means of a distributed BT model and correlated to the most pronounced reduction of N bt extracted from C-V hysteresis.…”