On the Effect of Approximate-Computing in Motion Estimation

Paltrinieri, Alberto; Peloso, Riccardo; Masera, Guido; Shafique, Muhammad; Martina, Maurizio

doi:10.1166/jolpe.2019.1592

Cited by 8 publications

(3 citation statements)

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“…Based on the power–accuracy trade‐off obtained with 55 and 28 nm technologies, it is seen that the approximate adders that do not require carry propagation for computation of the approximate lower‐part sum perform better in terms of power savings. Studies in Refs [1,9,10,12] also concluded at a similar results. Therefore, we focussed on Truncation, AMA5, LOA, ETA‐I, InXA1, and MA to build larger approximate image and signal processing systems.…”

Section: Proposed Measure For Comparison Of Approximate Adderssupporting

confidence: 69%

“…The approximate adders can be broadly classified as either low-power approximate adders (LPAAs) [1][2][3][4][5][6][7] or low-latency approximate adders (also categorized as accuracy configurable adders- [8] and references therein). Studies have indicated that LPAAs can result in significant power savings when used in applications [9][10][11]. The purpose of this study is to improve the poweraccuracy trade-off in systems, considering LPAAs.…”

Section: Introductionmentioning

confidence: 99%

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Analysis of power–accuracy trade‐off in digital signal processing applications using low‐power approximate adders

Dharmaraj

Vasudevan

Chandrachoodan

2021

IET Computers & Digital Tech

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In recent years, approximate circuit design targeting the error‐tolerant applications has gained significance. In this study, the authors propose a metric that ranks a stand‐alone approximate adder in terms of power savings obtained for a given mean error distance/mean square error (MSE). The authors demonstrate that this ranking of approximate adders can be used in applications that contain adder trees and registers. In applications that also have accurate multipliers interspersed with adders, the authors find that certain types of approximations in the adders result in more power‐efficient implementations of multipliers. Besides power savings, the other metrics of interest are noise floor and mean error in filtering applications and the compression achieved for a given peak signal‐to‐noise ratio (PSNR) in image compression applications. The authors also show that for the same overall MSE, there is a trade‐off between noise floor and mean error. This makes it possible to classify these adders based on whether they result in an increased noise floor or a mean error for the same overall MSE. Furthermore, the authors discuss the effect of using an approximate discrete cosine transform block to meet the reduced PSNR requirements, on the overall compression levels and the trade‐offs involved in the process.

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Section: Proposed Measure For Comparison Of Approximate Adderssupporting

confidence: 69%

Section: Introductionmentioning

confidence: 99%

Analysis of power–accuracy trade‐off in digital signal processing applications using low‐power approximate adders

Dharmaraj

Vasudevan

Chandrachoodan

2021

IET Computers & Digital Tech

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“…To normalize the results of the probabilistic model, the above equation introduces a regularization constant to limit the range of the results, and the scale parameter σ is used to reflect the feedback of the change in scale during the target tracking process on the context prior probabilistic model [22].…”

Section: Optimized Interframe Difference Detection Functionmentioning

confidence: 99%

An Algorithm for Motion Estimation Based on the Interframe Difference Detection Function Model

Zhang

Kang

2021

Complexity

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In this paper, we simulate the estimation of motion through an interframe difference detection function model and investigate the spatial-temporal context information correlation filtering target tracking algorithm, which is complex and computationally intensive. The basic theory of spatiotemporal context information and correlation filtering is studied to construct a fast target tracking method. The different computational schemes are designed for the flow of multiframe target detection from background removal to noise reduction, to single-frame detection, and finally to multiframe detection, respectively. This enables the ground-based telescope to effectively detect spatial targets in dense stellar backgrounds in both modes. The method is validated by simulations and experiments and can meet the requirements of real projects. The interframe bit attitude estimation is optimized by using the beam-parity method to reduce the interframe estimation noise; a global optimization strategy based on the bit attitude map is used in the back end to reduce the system computation amount and make the global bit attitude estimation more accurate; a loop detection based on the word pocket model is added to the system to reduce the cumulative error.

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VVC Interpicture Prediction Using SAD with Imprecise Subtractors: A Quantitative Analysis

Ferreira

Santos

Agostini

et al. 2022

2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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On the Effect of Approximate-Computing in Motion Estimation

Cited by 8 publications

References 0 publications

Analysis of power–accuracy trade‐off in digital signal processing applications using low‐power approximate adders

Analysis of power–accuracy trade‐off in digital signal processing applications using low‐power approximate adders

An Algorithm for Motion Estimation Based on the Interframe Difference Detection Function Model

VVC Interpicture Prediction Using SAD with Imprecise Subtractors: A Quantitative Analysis

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