On the Impact of Timer Resolution in the Efficiency Optimization of Synchronous Buck Converters

Abstract

Excessive dead time in complementary switches causes significant energy losses in DC-DC power conversion. The optimization of dead time prevents the degradation of overall efficiency by minimizing the body diode conduction of power switches and, as a consequence, also reduces reverse recovery losses. The present work aims at analyzing the influence of one of the most important characteristics of a digital controller, the timer resolution, in the context of dead-time optimization for synchronous buck converters. In specific, the analysis quantifies the efficiency de-pendency on the timer resolution, in a parameter set that comprises duty-cycle and dead-time, and also converter frequency and analog-to-digital converter accuracy. Based on a sensorless optimization strategy, the relationship between all these limiting factors is described, such as the number of bits of timer and analog-to-digital converter. To validate our approach experimental results are provided using a 12-to-1.8V DC-DC converter, controlled by low- and high-resolution pulse-width modulation signals generated with an XMC4200 microcontroller from Infineon Technologies. The measured results are consistent with our analysis, which predicts the power efficiency improvements not only with a fixed dead time approach, but also with the increment of timer resolution.

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