2007
DOI: 10.1063/1.2781551
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On the positive channel threshold voltage of metal gate electrodes on high-permittivity gate dielectrics

Abstract: Factors responsible for the undesirably high values of positive-channel (p-channel) threshold voltage (Vt) in high-κ metal oxide semiconductor transistors are investigated. In silicon/silicon dioxide/hafnium dioxide/metal gate transistors an anomalous nonlinear relationship between the equivalent oxide thickness (EOT) and Vt occurs when the silicon dioxide (SiO2) interface layer is sufficiently thin (<2.3 nm). The deviation from the expected EOT versus Vt behavior is shown to be related to processing te… Show more

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Cited by 17 publications
(11 citation statements)
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“…These results mean that an electron trapping/detrapping mechanism was adopted and trap sites were not generated during stress conditions. 44 An improved dielectric/channel interface trapping site may lead to smaller voltage shifts.…”
Section: Resultsmentioning
confidence: 99%
“…These results mean that an electron trapping/detrapping mechanism was adopted and trap sites were not generated during stress conditions. 44 An improved dielectric/channel interface trapping site may lead to smaller voltage shifts.…”
Section: Resultsmentioning
confidence: 99%
“…The extrinsic Fermi pinning is most noticeable for p-metals on smaller EOT stacks. This is known as the V t roll-off effect [12], as was shown in Fig 52. Song [273], Akiyama [274], Schaeffer [275] and Bersuker [276] have produced models to explain this effect, based on oxygen transfer. Bersuker [276] attributes rol-off to the formation of positively charged O vacancies close to the channel.…”
Section: Extrinsic Pinning Modelsmentioning
confidence: 99%
“…Given that scavenging can still be used for gate last, it is important to understand the degree of V t control that can be achieved [311][312][313]. In particularly, there is the problem of V t roll-off for the pFET [275]. Fig 74 plots the V t vs EOT for gate last stacks, including the scavenged regime [312].…”
Section: Scavenging and Ultra-low Eotmentioning
confidence: 99%
“…This relationship between gate dielectric thickness and threshold voltage is similar to that observed in silicon field-effect TFTs with very thin inorganic oxide gate dielectrics. 15 The greatest concern with thin gate dielectrics is the undesirable charge leakage through the dielectric. Figure 2͑e͒ shows that the gate current in the TFTs with C6-SAM is approximately the same as that in TFTs without any SAM, about 1 nA.…”
mentioning
confidence: 99%