On the Suitability of Discrete-Time Receivers for Software-Defined Radio

Abstract

Abstract-CMOS radio receiver architectures, based on radio frequency (RF) sampling followed by discrete-time (D-T) signal processing via switched-capacitor circuits, have recently been proposed for dedicated radio standards. This paper explores the suitability of such D-T receivers for highly flexible softwaredefined radio (SDR) receivers. Via symbolic analysis and simulations we analyze the properties of D-T receivers, and show that at least three challenges exist to make a D-T receiver work for SDR: 1) the sampling clock frequency is related to the radio frequency, complicating baseband filter design; 2) a frequency-dependent phase shift is introduced by pseudoquadrature and pseudo-differential sampling; 3) the conversion gain of a charge sampling front-end is strongly frequencydependent. Compared to a mixer based radio receiver, extra costs are needed to solve these problems.

Passive Switched Capacitor RF Front Ends for Spectrum Sensing in Cognitive Radios

“…Moreover, it is possible to use charge domain sampling to leverage the inherent benefits of including of a built-in antialias filter into the sampler, robustness to jitter, and the ability to vary the resulting filter notches by simply varying the integration period. This use of RF samplers and subsequent discrete time processing provide a number of advantages in deep submicron CMOS processes [17]. Recently, other discrete time radio receivers using RF sampling have been demonstrated using CMOS technology for Bluetooth [18], GSM/GPRS [19], WLAN [20], and SDR type applications [9,21].…”

Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio

“…Compared to CT-mixing receivers, RF-sampling receivers may require extra complexity, due to RF-related baseband sample rate [12] and extensive clock control for the switched-capacitor (SC) circuits used for DT operation. However, RF sampling may also offer advantages on the compatibility to CMOS scaling [3]- [6], [23] and system-on-chip (SoC) integration [4], [5], for instance, by extensively using of switches, capacitors and timing.…”

“…All these receivers [9]- [11] use wideband front-ends based on CT mixing. On the other hand, traditional RF sampling [1]- [6] is not directly suitable for SDR [12], as it provides quadrature demodulation and harmonic rejection over a limited channel bandwidth (BW), limiting SDR flexibility.…”

A tunable 300–800MHz RF-sampling receiver achieving 60dB harmonic rejection and 0.8dB minimum NF in 65nm CMOS

“…Sampling early at RF allows more discretetime and digital signal processing, which can have advantages with respect to the compatibility with digital CMOS technology [1] [2] and SoC integration [3]. However, most published RF-sampling receivers are narrowband, and compared to RF-mixing receivers, a number of extra challenges exist to apply RF-sampling to wideband software-defined radio (SDR) receivers [4].…”