On the understanding of electron and hole mobility models from room to liquid helium temperatures

Parameter Extraction of MOSFETs Operated at Low Temperature

“…Ernrani et al conclude from these studies that the universal field dependence approach represented by eqs. (13) and (14) has no physical meaning at cryogenic T and should therefore not be used [54], [64]. The same conclusion followed from the effect of Fowler-Nordheim carrier injection on the low temperature peff 1541 ,[651.…”

“…As pointed out earlier [53]- [54], the extraction of peff from a linear input curve at cryogenic temperatures requires in fact already an accurate modelling of the device characteristics, in case of the kff dependence on the nom~al field, on T, etc. This implies that most of the extraction methods which have been proposed recently [55]-[S71 are rather complex and require numerical treatment of the measurement data.…”

“…Since O* is a positive number and n becomes larger than 2 upon cooling, from eqs (10) and (1 1) follows that the linear extrapolated threshold voltage VText is slightly larger than the actual VT at low T. In practice, it turns out that the exponent n starts to increase in the range between roughly 100 K and 200 K for n-channel devices, depending on the technology, while for p-MOSFETs, the change from 2 to 3 occurs between 20 K and 4.2 K. Physically speaking, the change of n from 2 to 3 points to a change in the dominant scattering mechanism upon cooling. Likewise, the bell-shaped Yeff behaviour typically found at low T can be explained by assuming that kff is an explicit function of the inversion charge Q, which in its most general form is represented by [54]: whereby the coefficient A is a Coulomb scattering parameter and B a surface roughness scattering parameter.…”

Y-Function Analysis of the Low Temperature Behavior of Ultrathin Film FD SOI MOSFETs

“…Another reason for the increase of the series resistance may be increasing the dopant concentration in the drain/source extensions zones due to lateral diffusion from the source/drain occurring during the gate recessed process. [15,17]. On the other side, Simoen et al [24] used a similar analysis and found = 2.08 for 77 K and = 1.92 for = 300 K for MOS devices having a high resistive silicon substrate.…”

“…The low temperature study of MOSFETs' general behavior [9][10][11][12], effective mobility [13][14][15], and source/drain series resistance [16] was started two decades ago while the focus of those analyses mainly remained fixed on the bulk silicon transistors. With the years, several useful models and laws were developed to treat these MOS devices.…”