2015 IEEE 22nd International Conference on High Performance Computing (HiPC) 2015
DOI: 10.1109/hipc.2015.32
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On the Use of Commodity Ethernet Technology in Exascale HPC Systems

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Cited by 11 publications
(19 citation statements)
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“…Per input-buffer flow control is supported by Priority-based Flow Control (PFC), which supports individual pauses per buffer but does not handle buffer credits. 7 The conditional decision in that original proposal relied on the PAUSE status of each output port, but such implementation presents poor throughput under uniform traffic at high loads and poor fairness and average latency under adversarial traffic, as shown in an earlier work. The application of this Ethernet technology to build Dragonfly networks follows the ideas introduced in an earlier work, 7 including hierarchical MAC address rewriting and TCAM compaction, which are required for the mechanism to work but are not relevant for this study.…”
Section: Switch Architecturementioning
confidence: 98%
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“…Per input-buffer flow control is supported by Priority-based Flow Control (PFC), which supports individual pauses per buffer but does not handle buffer credits. 7 The conditional decision in that original proposal relied on the PAUSE status of each output port, but such implementation presents poor throughput under uniform traffic at high loads and poor fairness and average latency under adversarial traffic, as shown in an earlier work. The application of this Ethernet technology to build Dragonfly networks follows the ideas introduced in an earlier work, 7 including hierarchical MAC address rewriting and TCAM compaction, which are required for the mechanism to work but are not relevant for this study.…”
Section: Switch Architecturementioning
confidence: 98%
“…7 The conditional decision in that original proposal relied on the PAUSE status of each output port, but such implementation presents poor throughput under uniform traffic at high loads and poor fairness and average latency under adversarial traffic, as shown in an earlier work. 7 Instead of pauses, our proposal characterizes each output port with a percentage value, which defines the probability of minimal routing through that output. This design was proposed and partially evaluated in our previous work 9 and will be presented in more detail in Section 3.…”
Section: Switch Architecturementioning
confidence: 98%
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