One Transistor Ferroelectric Memory Devices with Improved Retention Characteristics

Li, Tingkai; Hsu, Sheng Teng; Ulrich, Bruce; Stecker, Lisa; Evans, Dave

doi:10.1143/jjap.41.6890

Cited by 19 publications

(7 citation statements)

References 3 publications

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“…We are now investigating two kinds of applications of the FeFETs, which are FeCMOS nonvolatile logic circuits and FeNAND flash memories. Note that FeFETs based on different materials and on different types have been investigated during the last decade, which are listed only partially in [19,20,21,22,23,24,25,26]. …”

Section: Introductionmentioning

confidence: 99%

Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory

Sakai

Takahashi

2010

Materials

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We have investigated ferroelectric-gate field-effect transistors (FeFETs) with Pt/SrBi2Ta2O9/(HfO2)x(Al2O3)1−x (Hf-Al-O) and Pt/SrBi2Ta2O9/HfO2 gate stacks. The fabricated FeFETs have excellent data retention characteristics: The drain current ratio between the on- and off-states of a FeFET was more than 2 × 106 after 12 days, and the decreasing rate of this ratio was so small that the extrapolated drain current ratio after 10 years is larger than 1 × 105. A fabricated self-aligned gate Pt/SrBi2Ta2O9/Hf-Al-O/Si FET revealed a sufficiently large drain current ratio of 2.4 × 105 after 33.5 day, which is 6.5 × 104 after 10 years by extrapolation. The developed FeFETs also revealed stable retention characteristics at an elevated temperature up to 120 °C and had small transistor threshold voltage (Vth) distribution. The Vth can be adjusted by controlling channel impurity densities for both n-channel and p-channel FeFETs. These performances are now suitable to integrated circuit application with nonvolatile functions. Fundamental properties for the applications to ferroelectric-CMOS nonvolatile logic-circuits and to ferroelectric-NAND flash memories are demonstrated.

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Section: Introductionmentioning

confidence: 99%

Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory

Sakai

Takahashi

2010

Materials

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“…Its functionality arises from the attenuation of the charge carrier concentration in the semiconductor by the ferroelectric polarization of the gate insulator. Even though inorganic FeFETs have been studied for decades, a memory performance of any practical value has been achieved only in recent years [2][3][4][5][6][7][8] . The main problems that have arisen are charge trapping at the ferroelectric-semiconductor interface and the lack of thermal stability of the interface.…”

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confidence: 99%

High-performance solution-processed polymer ferroelectric field-effect transistors

et al. 2005

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We demonstrate a rewritable, non-volatile memory device with fl exible plastic active layers deposited from solution. The memory device is a ferroelectric fi eld-effect transistor (FeFET) made with a ferroelectric fl uoropolymer and a bisalkoxy-substituted poly(p-phenylene vinylene) semiconductor material. The on-and off-state drain currents differ by several orders of magnitude, and have a long retention time, a high programming cycle endurance and short programming time. The remanent semiconductor surface charge density in the on-state has a high value of 18 mC m -2 , which explains the large on/off ratio. Application of a moderate gate fi eld raises the surface charge to 26 mC m -2 , which is of a magnitude that is very diffi cult to obtain with conventional FETs because they are limited by dielectric breakdown of the gate insulator. In this way, the present ferroelectricsemiconductor interface extends the attainable fi eldeffect band bending in organic semiconductors.A memory element based on the ferroelectric fi eld-effect transistor (FeFET) is attractive because of its non-volatile data retention, small size, rewritability, non-destructive read-out, low-voltage operation and short programming time 1 . Its functionality arises from the attenuation of the charge carrier concentration in the semiconductor by the ferroelectric polarization of the gate insulator. Even though inorganic FeFETs have been studied for decades, a memory performance of any practical value has been achieved only in recent years [2][3][4][5][6][7][8] . The main problems that have arisen are charge trapping at the ferroelectric-semiconductor interface and the lack of thermal stability of the interface. This has prompted the use of insulating buffer layers between the semiconductor and ferroelectric to prevent charge injection and protect the semiconductor from the high-temperature annealing procedure that is required for inorganic ferroelectrics. Crucial device parameters for all memory devices are the on/ off ratio, data retention time, programming cycle endurance and programming time. Current state-of-the-art inorganic FeFETs have on/off ratios up to 10 9 , a retention time of 16 days and a programming time of 10 -8 s (refs 5,8). This is promising, although the high production cost of this non-CMOS (complementary metal-oxide-semiconductor) technology may hinder widespread application.Organic fi eld-effect transistors are ideally suited for low-cost, low-performance logic circuit applications on fl exible substrates 9 .

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“…The structure of this device is very similar to that of the state-of-the-art MFMOS memory transistor [3][4][5][6]. The gate stack configuration is metal ferroelectric metal n-type semiconductive metal oxide on p-type silicon.…”

Section: Device Structurementioning

confidence: 99%

“…N spite of extensive study of the ferroelectric memory transistors during the past 10 years the device is still far away from practical use [1][2][3][4][5][6][7]. The commercial ferroelectric memory devices are made of 1T1C ferroelectric memory array.…”

Section: Introductionmentioning

confidence: 99%

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MFMox ferroelectric memory transistor

Hsu¹,

Li²

Proceedings. 2004 IEEE Computational Systems Bioinformatics Conference

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Ferroelectric memory transistor is known for poor charge retention time. An alternative device structure has been developed to solve the retention problem of ferroelectric memory transistors. The gate structure of the new ferroelectric memory transistor is metal on ferroelectric thin film on bottom electrode on n-type semiconductive metal oxide on p-type silicon. The bottom electrode is in direct contact to the semiconductive metal oxide. Therefore, there is no floating gate in this device. The threshold voltage memory window of an experimental device extrapolation from 4 days of measured data to 10 years is about 1V. Index Terms-Ferroelectric, MFMox, Non-volatile MemoryTransistor 0-7803-8726-0

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One Transistor Ferroelectric Memory Devices with Improved Retention Characteristics

Cited by 19 publications

References 3 publications

Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory

Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory

High-performance solution-processed polymer ferroelectric field-effect transistors

MFMox ferroelectric memory transistor

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