OpenCL Implementation of an Adaptive Disruption Predictor Based on a Probabilistic Venn Classifier

Ruiz, Antonio Carpeño; Ruiz, M.; González, Cristiam Andrés Gil; Vega, J.; Dormido-Canto, S.; Esquembri, S.; Bernal, Enrique

doi:10.1109/tns.2019.2904865

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Cited by 3 publications

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“…The software solution is combined with the Nominal Device Support v3 (NDSv3) approach [11] to modularize device driver implementation and provide an interface with the CS. As OpenCL is typically used for accelerating computations, it has been previously explored for DAQ applications [8][9][10], but a complete DAQ framework has not yet been developed.…”

Section: Introductionmentioning

confidence: 99%

A methodology to standardize the development of FPGA-based high-performance DAQ and processing systems using OpenCL

Astrain

Ruiz

et al. 2020

Fusion Engineering and Design

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Section: Introductionmentioning

confidence: 99%

A methodology to standardize the development of FPGA-based high-performance DAQ and processing systems using OpenCL

Astrain

Ruiz

et al. 2020

Fusion Engineering and Design

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Real-Time FPGA Implementation of FIR Filter Using OpenCL Design

Firmansyah

Yamaguchi

2022

J Sign Process Syst

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Prediction Techniques on FPGA for Latency Reduction on Tactile Internet

Silva

Dias

et al. 2022

Sensors

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Tactile Internet (TI) is a new internet paradigm that enables sending touch interaction information and other stimuli, which will lead to new human-to-machine applications. However, TI applications require very low latency between devices, as the system’s latency can result from the communication channel, processing power of local devices, and the complexity of the data processing techniques, among others. Therefore, this work proposes using dedicated hardware-based reconfigurable computing to reduce the latency of prediction techniques applied to TI. Finally, we demonstrate that prediction techniques developed on field-programmable gate array (FPGA) can minimize the impacts caused by delays and loss of information. To validate our proposal, we present a comparison between software and hardware implementations and analyze synthesis results regarding hardware area occupation, throughput, and power consumption. Furthermore, comparisons with state-of-the-art works are presented, showing a significant reduction in power consumption of ≈1300× and reaching speedup rates of up to ≈52×.

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OpenCL Implementation of an Adaptive Disruption Predictor Based on a Probabilistic Venn Classifier

Cited by 3 publications

References 16 publications

A methodology to standardize the development of FPGA-based high-performance DAQ and processing systems using OpenCL

A methodology to standardize the development of FPGA-based high-performance DAQ and processing systems using OpenCL

Real-Time FPGA Implementation of FIR Filter Using OpenCL Design

Prediction Techniques on FPGA for Latency Reduction on Tactile Internet

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