Operation of a 1-bit quantum flux parametron shift register (latch) by 4-phase 36-GHz clock

Hosoya, M.; Hioe, W.; Takagi, Kazumasa; Goto, Eiichi

doi:10.1109/77.403181

Cited by 15 publications

(7 citation statements)

References 11 publications

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“…The shift regis-ter, being more relevant here, is a fast memory for on chip with processing, related to "registers" and cache. It has been demonstrated in RSFQ 39 , RQL 11 , and AQFP 40 . It has also been adapted for memory arrays in processors 10,41 .…”

Section: G Discussionmentioning

confidence: 96%

Asynchronous Reversible Computing Unveiled Using Ballistic Shift Registers

Osborn¹,

Wustmann²

2022

Preprint

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Reversible logic has recently progressed in superconducting circuits and promises momentous improvements in computing efficiency relative to irreversible logic developed by industry in semiconductor circuits. Superconducting logic uses single flux quanta (SFQ) to represent bits, and unlike their irreversible SFQ-logic relatives the bits may switch state with extremely low dissipation. Here we propose and simulate ballistic shift registers (BSRs). These devices are reversible and dramatically more energy-efficient than previous ones, including a pioneering one developed before the advent of SFQ logic. The BSR is ballistic because no power is supplied to the gate other than the input bits themselves; the results are conveyed as slightly slower output bits. The BSR uses an SFQ of either polarity for the stored bit as well as ballistic fluxons. The BSR additionally uses shunt capacitors and the nonlinearity of the ends of long Josephson junctions to support partial fluxons and energy-conserving dynamics. The BSRs are multi-port and allow asynchronous bit arrivalimportant functionalities not available in previous reversible gates. During their interaction, the stored and the moving bits swap their bit states, resulting in the shift-register operation. We show that two BSRs operate in sequence without power added. In addition, we show that a BSR circuit with two inputs allows a bit state to be conveyed on different outputs. This constitutes the first asynchronous ballistic 2-input gate. Finally, for a more intuitive understanding of the dynamics, we introduce a collective coordinate model. It describes the 1-bit BSR dynamics with the motion of two coordinates in a potential determined by the states of the input bit and the initial stored SFQ. We discuss the potential for this SFQ logic type in the context of energy efficiency, parameter margins, logical depth, and speed.

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Section: G Discussionmentioning

confidence: 96%

Asynchronous Reversible Computing Unveiled Using Ballistic Shift Registers

Osborn¹,

Wustmann²

2022

Preprint

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“…The major problem of QFP-based circuits was high-frequency multi-phase ac power supply (which was later borrowed by RQL). While there were different approaches elaborated for its solution [ 57 , 59 ], finally multi-phase ac biasing was recognized to be an intractable obstacle for the implementation of complex practical high-clock-frequency circuits and the QFP-based approach was abandoned for some years.…”

Section: Reviewmentioning

confidence: 99%

Beyond Moore’s technologies: operation principles of a superconductor alternative

Soloviev

Klenov

Bakurskiy

et al. 2017

Beilstein J. Nanotechnol.

170

103

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The predictions of Moore’s law are considered by experts to be valid until 2020 giving rise to “post-Moore’s” technologies afterwards. Energy efficiency is one of the major challenges in high-performance computing that should be answered. Superconductor digital technology is a promising post-Moore’s alternative for the development of supercomputers. In this paper, we consider operation principles of an energy-efficient superconductor logic and memory circuits with a short retrospective review of their evolution. We analyze their shortcomings in respect to computer circuits design. Possible ways of further research are outlined.

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“…The n-bit ALU critical path is minimized by generating the CARRY bit as soon as possible, in 2 stages, one for an AND operation which controls the passage of the CARRY input, given in (2). and the other for a MAJ operation which Figure 4 shows a micro-photograph of the fabricated circuit.…”

Section: Slszcimentioning

confidence: 99%

“…The Quantum Flux Parametron (QFP) [ 13 has been shown to operate at very high speeds [2]. Its application in logic devices, such as the majority gate [3], has also been demonstrated.…”

Section: Introducitonmentioning

confidence: 99%

Design and operation of a Quantum Flux Parametron bit-slice ALU

Hioe

Hosoya

Kominami

et al. 1995

IEEE Trans. Appl. Supercond.

Self Cite

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The design of Quantum Flux Parametron (QFP) majority logic circuits presents a number of unique constraints. For example, interconnects must be kept short and have a common small inductance. The former suggests that the bit-slice architecture is well suited to QFP circuits. In order to test this conjecture, a suitably complex logic circuit was designed and a small part of it was fabricated. A design for a 1Cfunction bitslice arithmetic-logic unit (ALU) was found that satisfied the constraints. It can compute on n-bit operands in 2n+4 QFP stages. A reduced version of the bit-slice ALU cell, containing 30 QFP's, was fabricated and successfully tested at low speed. The design experience showed that complex combinatorial QFP logic circuits are possible. Larger circuits will be feasible with computer-aided tools. I. INTRODUCITONThe Quantum Flux Parametron (QFP) [ 13 has been shown to operate at very high speeds [2]. Its application in logic devices, such as the majority gate [3], has also been demonstrated. Being a single flux quantum device, it also has a low power dissipation. These characteristics suggest that QFP logic circuits will be capable of high performance.The design of QIT logic circuits, however, presents a number of unique problems. Interconnects between QFP's must be kept short because of adverse effects on overall clock speed, circuit area and margin. In majority logic circuits, interconnect inductances, which make up most of the QFP load, are additionally required to be a fixed value. These two constraints and others cause much difficulty in the layout and routing design. On the logic design level, the short interconnect constraint restricts circuit architecture. Bit-slice architecture, besides using only short interconnects, should also be able to exploit the inherent pipelined nature of the QFP for high throughput.The feasibility of QFP majority gates for complex logic circuits is tested through schematic design of a bit-slice 16-function arithmetic-logic unit (ALU). This paper reports the results. The ALU was chosen because it was non-trivial, had a variety of gates, and was not too complex to be hand designed. Feasibility was further tested by fabrication and operation of a reduced version of the bit-slice cell. The 1-bit ALU, the largest logic circuit so far for a single flux quantum device, operated successfully at low speed.The rest of the paper is organized as follows. In section I1 the QFP majority logic gate family is reviewed, focusing on aspects affecting layout and routing design. In section I11 the reasons for restricting interconnect length are presented in Manuscript received Oct 17,1994. This work was supported by the Research Development Corportatim of Japan (JRDC). activation input QFp sign+ input LL load . inductor Fig. 1. The QFP circuit scheme. Shunt resistors shown are only needed if the junaions are hysteretic.detail. The method used to overcome problems in the design of fixed inductance interconnects is described. Logic design is presented in section IV. The experimental evalu...

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Operation of a 1-bit quantum flux parametron shift register (latch) by 4-phase 36-GHz clock

Cited by 15 publications

References 11 publications

Asynchronous Reversible Computing Unveiled Using Ballistic Shift Registers

Asynchronous Reversible Computing Unveiled Using Ballistic Shift Registers

Beyond Moore’s technologies: operation principles of a superconductor alternative

Design and operation of a Quantum Flux Parametron bit-slice ALU

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