Optical, structural and electrical characterizations of stacked Hf-based and silicon nitride dielectrics

Abstract

International audienceHigh-k stacked dielectric structures were fabricated by a combination of RF magnetron sputtering and plasmaenhancedchemical vapor deposition. Their structural properties were studied versus deposition and annealingconditions by means of attenuated total reflection and high-resolution transmission electron microscopy techniques.All samples demonstrated smoothed surface (with a roughness below 1 nm) and abrupt interfaces betweenthe different stacked layers. No crystallization of Hf-based layers was observed after annealing at 800 °Cfor 30 min, demonstrating their amorphous nature and phase stability upon annealing. Uniform capacitance–voltage characteristics were measured along the wafers for all stacks. Besides, after round-voltage sweep theydemonstrate significant flat-band voltage hysteresis due to charging of the stack caused by carrier injectionfrom the substrate. These phenomena were found to be more pronounced for the stacks with pure HfO2 layers.The stacked structures were implemented for the formation of Ge nanocrystals by means of ion implantationfollowed by the thermal treatment mentioned above. It was found that the spatial distribution of Ge crystallitesin stacked dielectrics affects significantly their electrical properties including the trapping of charge

A Review on Ge Nanocrystals Embedded in SiO2 and High‐k Dielectrics

“…GeHfO x layers were synthesized by MS, Ge‐ion implantation, EBE, and CVD . Annealing is usually performed between 600 and 900 °C .…”

“…The crystallization of the Ge proportion sets in between 600 and 800 °C . Pure HfO 2 layers crystallize between 700 and 800 °C . However, if Ge is incorporated into the HfO 2 , the crystallization temperature of the matrix is reduced significantly toward about 600 to 700 °C .…”

Review—Silicon Nitride and Silicon Nitride-Rich Thin Film Technologies: Trends in Deposition Techniques and Related Applications

“…A common rule of thumb 32,38,75 in the PE-CVD and PA-CVD work appears to be that lower R = NH 3 /SiH 4 flow ratios (R < 1) lead to Si-rich films (Si/N ratio > 1.1), while higher R (R > 1) produces N-rich films (N/Si ratio > 1.4), with inclusions of Si nanostructures or nanoscale intrusions at even higher R values. Also, lower substrate temperatures tend to yield a-SiN x :H films, with thermal annealing required to reduce H content and lead to film crystallization, while higher processing temperatures produce c-SiN x films with reduced hydrogen content.…”

“…Comparable results were obtained in the case of PE-CVD SiN x from a N 2 +SiH 4 mixture, with Si-rich films being formed at higher N 2 flows. 75 Studies of post-deposition thermal annealing effects were also reported under different annealing modes, gases, and durations, with 21 or without vacuum break between the deposition and annealing steps: 36,38,41,42 In the case of in situ annealing, 21 SiN x multilayered permeation barrier stacks deposited on PET substrates <100…”

“…75 A unique application is as a host material for Si nanocrystals as active light emitters for uses in PL and optoelectronic devices. Given that sputtering tends to be a line of sight technique, the application of sputtering techniques is primarily limited to topographies that are less aggressive with more relaxed design rules and smaller aspect ratios than their CVD and ALD counterparts.…”