Optimal Performance Prediction of ADAS Algorithms on Embedded Parallel Architectures

Abstract

International audienceADAS (Advanced Driver Assistance Systems) algorithms increasingly use heavy image processing operations. To embed this type of algorithms, semiconductor companies offer many heterogeneous architectures. These SoCs (System on Chip) are composed of different processing units, with different capabilities, and often with massively parallel computing unit. Due to the complexity of these SoCs, predicting if a given algorithm can be executed in real time on a given architecture is not trivial. In fact it is not a simple task for automotive industry actors to choose the most suited heterogeneous SoC for a given application. Moreover, embedding complex algorithms on these systems remains a difficult task due to heterogeneity, it is not easy to decide how to allocate parts of a given algorithm on the different computing units of a given SoC. In order to help automotive industry in embedding algorithms on heterogeneous architectures, we propose a novel approach to predict performances of image processing algorithms applicable on different types of computing units. Our methodology is able to predict a more or less wide interval of execution time with a degree of confidence using only high level description of algorithms, and a few characteristics of computing units

A novel global methodology to analyze the embeddability of real-time image processing algorithms

“…These values have to be chosen in accordance with the mean range magnitude of all the intervals of s and d. Under these practical conditions, the kernel mapping optimization consists in finding the mapping function M that will minimize the cost function F : In order to solve this optimization, one might implement each kernel and then measure each s and d for different mappings, but this requires significant effort and time. As discussed in [30,31], we propose to solve this minimization problem without any kernel implementation or profiling on the targeted architecture. Thus, we explore automatically all the mappings belonging to the set M by using our performance prediction methodology described further.…”

“…In [30,31], we present a methodology to predict computing time of a kernel on different processors. Our methodology is defined as follows.…”

A Robust Methodology for Performance Analysis on Hybrid Embedded Multicore Architectures

“…When working with heterogeneous architectures, a challenge needs to be addressed: how to partition the different tasks (or kernels) of the algorithm to embed on the different processors of the heterogeneous architecture. That is what we call the kernel mapping problem, introduced in [1]- [3].…”

“…As discussed in [2], [3], the parameters of the function f can be predicted for different M . In these papers we have presented a methodology to estimate the execution τ (M ) and transfer δ(M ) times with little knowledge of target architectures.…”

“…First, one needs to guess the best suited SoC for a given application, then one needs to find how to partition the computational load on the different processors of the heterogeneous SoC. In [2], [3] we present a way to address these challenges, by using performance prediction. However, performance prediction models need architecture characteristics to proceed, and this information is not always provided by suppliers.…”