Optimal Sorting Algorithms for Parallel Computers

Baudet,; Stevenson,

doi:10.1109/tc.1978.1674957

Cited by 135 publications

(48 citation statements)

References 7 publications

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“…[2] 10101000 0010101010101000 0000101010001010 0100000010101011 0000000000000010 0000000000000000 [3] 00000000 0000010111110000 0000000000000000 0000000010101010 0000010101000000 0101100000001100 [4] 00000011 0111100000000100 1100000011110000 0001110000010010 0000000000000000 0000000000000010 [5] 00000000 0000000000000000 0000000000000000 0000010100001000 0000000000000000 0000001100110011 [6] 00000000 0000000000000000 0000000000000001 0000100010000000 0000000000000100 0010100000010000 [7] 00000000 0000000000000001 0001010000001000 0000000100101000 0000000101000000 0000000000111000 [8] 00000000 0000000000000000 0000000100100000 0000001000010100 0010001000101000 0000001010000100 [9] 00000000 0001000010101000 0000100001110000 0000100000011000 0000000000001111 0000000001100000…”

Section: Output: A[ ] ( the Array In Sorted Order) *) Beginmentioning

confidence: 99%

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Arbitrary long digit integer sorter HW/SW co-design

Cheng

2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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Abstract--The coming of multimedia era and information security era indicates that must process longer digit integer data. Previous sort researches focus on pure performance of large amount of finite fixed digit/bit number. This paper discusses on effectively solving arbitrary long digit integer sorting problem by HW/SW co-design under the Area×Time 2 (AT 2 ) price-performance constraint. The work proposes multi-level (two-level) sort architecture to attain the object: an accomplished fixed-digit (k-bit) hardware sorter implements the first or basic level sorting, software programmed radix 2 k sort implements the second or higher level sorting. By Super Radix Sorting HW/SW co-design and reuse techniques, the work makes fixed-digit HW sorters more flexible and useful.

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Section: Output: A[ ] ( the Array In Sorted Order) *) Beginmentioning

confidence: 99%

“…Many fundamental processes in computing and communication systems require sorting of data. Sorting network play a key role in the areas of parallel computing, multi-access memories and multiprocessing [3], [4], [5], [6], [11], [13], [14], [19].…”

Section: Introductionmentioning

confidence: 99%

Arbitrary long digit integer sorter HW/SW co-design

Cheng

2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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“…Multiport bitonic sort can be further improved by using a linear-time serial merge instead of a bitonic merge in order to execute the merges that occur entirely within a processor [4]. We estimated that the time for a processor to merge two sorted sequences of length (n/2 p) to form a single sorted sequence of length (n/p) is approximately (n/p) · 10A.…”

Section: Batcher's Bitonic Sortmentioning

confidence: 99%

An Experimental Analysis of Parallel Sorting Algorithms

Blelloch

Leiserson

Maggs

et al. 1998

Theory of Computing Systems

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Abstract. We have developed a methodology for predicting the performance of parallel algorithms on real parallel machines. The methodology consists of two steps. First, we characterize a machine by enumerating the primitive operations that it is capable of performing along with the cost of each operation. Next, we analyze an algorithm by making a precise count of the number of times the algorithm performs each type of operation. We have used this methodology to evaluate many of the parallel sorting algorithms proposed in the literature. Of these, we selected the three most promising, Batcher's bitonic sort, a parallel radix sort, and a sample sort similar to Reif and Valiant's flashsort, and implemented them on the connection Machine model CM-2. This paper analyzes the three algorithms in detail and discusses the issues that led us to our particular implementations. On the CM-2 the predicted performance of the algorithms closely matches the observed performance, and hence our methodology can be used to tune the algorithms for optimal performance. Although our programs were designed for the CM-2, our conclusions about the merits of the three algorithms apply to other parallel machines as well. *

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“…; . = (l-(o)u. y + co. communications, in a manner similar, to that used in the odd-even transposition sort [4]. Labeling of connected components in an image can be done by using the bidirectional communication to merge labels in the subimages computed by individual cells [17].…”

Section: Gridmentioning

confidence: 99%

Computational models for parallel computers

Kung

1988

Phil. Trans. R. Soc. Lond. A

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Computational models define the usage patterns of a computer. They can be used to derive the architecture of the machine, provide guidelines for programming tools, and suggest how the machine should be used in applications. Identifying computational models is especially important for parallel computers, since their architectures and usages are still not well understood in general. This paper describes a number of computational models for parallel computers. These models characterize the communication patterns under which processors exchange their intermediate results during computation. Emphases are placed upon models for one-dimensional processor arrays, reflecting Carnegie Mellon's experiences with the Warp systolic array machine. These models include local computation, domain partition, pipeline, multifunction pipeline and ring.

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Optimal Sorting Algorithms for Parallel Computers

Cited by 135 publications

References 7 publications

Arbitrary long digit integer sorter HW/SW co-design

Arbitrary long digit integer sorter HW/SW co-design

An Experimental Analysis of Parallel Sorting Algorithms

Computational models for parallel computers

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