Optimization of electrical characteristics of TiO2-incorporated HfO2 n-type doped gallium arsenide metal oxide semiconductor capacitor with silicon interface passivation layer

Park, Sung Il; Ok, I.; Kim, Hyoung Sub; Zhu, Feng; Zhang, Manhong; Yum, Jung Hwan; Han, Zhewen; Lee, Jack C.

doi:10.1063/1.2775048

Cited by 5 publications

(1 citation statement)

References 4 publications

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“…Figure 7 plots the characteristic of J g vs CET or EOT along with the previously published data. 3,5,[13][14][15]38,39 We observed that the Gd 2 O 3 /n-GaAs capacitors through WCP optimization exhibited excellent insulating properties as compared to HfO 2 dielectrics reported on the n-GaAs in combination with Si or Ge interfacial passivation layers. A lower CET of ca.…”

Section: Gaas + As 2 O 3 → Ga 2 O 3 + 4as ͓4͔mentioning

confidence: 80%

Improved Electrical Properties of Gd[sub 2]O[sub 3]∕GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

Cheng

Chien

Luo

et al. 2008

J. Electrochem. Soc.

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In this study we demonstrated improved electrical characteristics of Gd 2 O 3 dielectric thin films on n-GaAs substrate by manipulating wet-chemical clean and ͑NH 4 ͒ 2 S passivation. With X-ray photoelectron spectroscopy analysis, the HCl-cleaned GaAs surface was characterized to possess oxide species mainly in the form of As 2 O x near the outmost surface and Ga 2 O x with elemental arsenic close to the interface. These undesirable components could be suppressed through rinsing in NH 4 OH alkaline solution and then performing sulfidization at 80°C, resulting in alleviating the Fermi level pinning effect on Gd 2 O 3 /GaAs capacitor performance. Higher oxide capacitance and alleviated frequency dispersion at the accumulation/depletion regimes were achieved, accompanied by negligible charge trapping ͑Ͻ100 mV͒. Accordingly, gate leakage J g was lowered to ca. 10 −5 A/cm 2 at gate voltage V g = ͑V FB + 1͒ V, which was comparable to the recently reported performance of HfO 2 /GaAs structure with an ultrathin Si/Ge interfacial layer. We attributed the electrical improvements to the enhanced stabilization of high-k/sulfur-terminated GaAs interface due to abatement of native oxides and excess arsenic segregation.

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Section: Gaas + As 2 O 3 → Ga 2 O 3 + 4as ͓4͔mentioning

confidence: 80%

Improved Electrical Properties of Gd[sub 2]O[sub 3]∕GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

Cheng

Chien

Luo

et al. 2008

J. Electrochem. Soc.

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Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al₂O₃ Passivation Layer and Forming Gas Annealing

Jiang

Liu

et al. 2018

Adv Elect Materials

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Metal‐oxide‐semiconductor (MOS) capacitors with sputtering‐deposited Gd‐doped HfO2(HGO) high k gate dielectric thin films and ALD‐derived Al2O3 interfacial passivation layer were fabricated on GaAs substrates. The effects of the passivation layer and the forming gas annealing (FGA) temperature were explored by studying the interfacial chemical bonding states and electrical properties of HGO/GaAs and HGO/Al2O3/GaAs gate stacks via x‐ray photoelectron spectroscopy (XPS), capacitance‐voltage (C–V), and leakage current density‐voltage ( J–V) measurements. Results indicated that the MOS capacitors performances were enhanced by performing FGA. The electrical analysis revealed that the 300 °C‐annealed Al/HGO/GaAs/Al MOS capacitor with 20 cycles Al2O3 passivation layer experienced improved electrical properties, with a dielectric constant of 44, a flat band voltage of 0.64 V, a hysteresis of 0.02 V corresponding to the oxide charge density of −6.2 × 1012 cm2, border trapped oxide charge density of −3.02 × 1011 cm2, a leakage current density 5.87 × 10‐6 A/cm2 at a bias voltage of 2 V. The low temperature (77–300 K) dependent detailed current conduction mechanisms (CCMs) of the 300 °C‐annealed MOS capacitor at low temperatures were also systematically investigated. The optimized interface chemistry and the excellent electrical properties suggested that HGO/Al2O3/GaAs potential gate stacks could be applied in future III‐V‐based MOSFET devices.

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Samarium Oxide and Samarium Oxynitride Thin Film as Alternative Gate Oxide on Silicon Substrate

Goh

Haseeb

Wong

2017

Reference Module in Materials Science and Materials Engineering

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Optimization of electrical characteristics of TiO2-incorporated HfO2 n-type doped gallium arsenide metal oxide semiconductor capacitor with silicon interface passivation layer

Cited by 5 publications

References 4 publications

Improved Electrical Properties of Gd[sub 2]O[sub 3]∕GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

Improved Electrical Properties of Gd[sub 2]O[sub 3]∕GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al₂O₃ Passivation Layer and Forming Gas Annealing

Samarium Oxide and Samarium Oxynitride Thin Film as Alternative Gate Oxide on Silicon Substrate

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Optimization of electrical characteristics of TiO2-incorporated HfO2 n-type doped gallium arsenide metal oxide semiconductor capacitor with silicon interface passivation layer

Cited by 5 publications

References 4 publications

Improved Electrical Properties of Gd[sub 2]O[sub 3]∕GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

Improved Electrical Properties of Gd[sub 2]O[sub 3]∕GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al2O3 Passivation Layer and Forming Gas Annealing

Samarium Oxide and Samarium Oxynitride Thin Film as Alternative Gate Oxide on Silicon Substrate

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Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al₂O₃ Passivation Layer and Forming Gas Annealing