Optimization of geometric multigrid for emerging multi- and manycore processors

Abstract

Abstract-Multigrid methods are widely used to accelerate the convergence of iterative solvers for linear systems used in a number of different application areas. In this paper, we explore optimization techniques for geometric multigrid on existing and emerging multicore systems including the Opteronbased Cray XE6, Intel R Xeon R E5-2670 and X5550 processorbased Infiniband clusters, as well as the new Intel R Xeon Phi TM coprocessor (Knights Corner). Our work examines a variety of novel techniques including communication-aggregation, threaded wavefront-based DRAM communication-avoiding, dynamic threading decisions, SIMDization, and fusion of operators. We quantify performance through each phase of the V-cycle for both single-node and distributed-memory experiments and provide detailed analysis for each class of optimization. Results show our optimizations yield significant speedups across a variety of subdomain sizes while simultaneously demonstrating the potential of multi-and manycore processors to dramatically accelerate single-node performance. However, our analysis also indicates that improvements in networks and communication will be essential to reap the potential of manycore processors in largescale multigrid calculations.

Collective memory transfers for multi-core chips

“…We then present application results for the following important stencil-based applications: fluid animation from the PARSEC benchmark suite [3], geometric multi-grid calculations (GMG) [40], seismic wave propagation simulation (RTM) [23], the SOBEL filter used extensively for image processing [10], and a collection of Laplacian stencil kernels [18]. For the application results, we model Intel Phi co-processors.…”

Collective Memory Transfers for Multi-Core Chips

“…We then present application results for the following important stencil-based applications: fluid animation from the PARSEC benchmark suite [6], geometric multi-grid calculations (GMG) [73], seismic wave propagation simulation (RTM) [46], the SOBEL filter used extensively for image processing [23], and a collection of Laplacian stencil kernels [35]. For the application results, we model Intel Phi co-processors, which are simple x86-based processors and representative of the simple cores projected for future many-core chips [9,68].…”

Compiler-based code generation and autotuning for geometric multigrid on GPU-accelerated supercomputers

“…Thus, each CUDA thread computes 64 output grid points (in the k dimension), and each thread block computes 32(TX)*16(TY)*64 = 32,768 output points. The optimized smooth in miniGMG uses a 3D grid of dimension {BX=2, BY= 16, BZ=64}, and 2D thread blocks {TX=32, TY= 4} [32].…”