Optimization of Suzuki Stack Circuit to Reduce Power Dissipation

Mustafa, Yerzhan; Köse, Selçuk

doi:10.1109/tasc.2022.3192202

Cited by 7 publications

(3 citation statements)

References 28 publications

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“…In Suzuki stack circuits, most of the power is dissipated across the bias resistor R b,SS [39]. A similar observation holds for the 4JL gate.…”

Section: Power Dissipationmentioning

confidence: 56%

“…As shown in table 2, the simulated power dissipation of DC-biased design is approximately 2.04 times higher as compared to the AC-biased design. The increased power dissipation of DC-biased Suzuki stack circuit can potentially be mitigated by using an optimization technique in [39], which can reduce the power dissipation by 30%-70%. Besides the superconducting circuits, the DC-biased design also require an additional transistor M r (figure 5).…”

Section: Power Dissipationmentioning

confidence: 99%

“…Recently, several optimization techniques have been proposed for the conventional AC-biased Suzuki stack design. These techniques focus on optimizing the power dissipation [39] and differential signaling [15]. Due to the similar internal design and working principle of Suzuki stack circuit, these optimization techniques can also be applied to the proposed DC-biased design.…”

Section: Compatibility With Existing Optimization Techniquesmentioning

confidence: 99%

See 2 more Smart Citations

DC-biased Suzuki stack circuit for Josephson-CMOS memory applications

Mustafa,

Krause,

Shah

et al. 2024

Supercond. Sci. Technol.

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Josephson-CMOS hybrid memory leverages the high speed and low power operation of single-flux quantum (SFQ) logic and the high integration densities of CMOS technology. One of the commonly used type of interface circuits in Josephson-CMOS memory is a Suzuki stack, which is a latching high-voltage driver circuit. Suzuki stack circuits are typically powered by an AC bias voltage that has several limitations such as synchronization and coupling effects. To address these issues, a novel DC-biased Suzuki stack circuit is proposed in this paper. As compared to a conventional AC-biased Suzuki stack circuit, the proposed DC-biased design can provide similar output voltage levels and parameter margins, approximately two times higher operating frequency, and three orders of magnitude lower heat load of bias cables.

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“…In Suzuki stack circuits, most of the power is dissipated across the bias resistor R b,SS [39]. A similar observation holds for the 4JL gate.…”

Section: Power Dissipationmentioning

confidence: 56%

Section: Power Dissipationmentioning

confidence: 99%