Optimization of the buffer thickness for high performance 1 μm gate GaAs MESFETs on InP substrate for OEICs

Chertouk, M.; Boudiaf, A.; Chovet, A.; Azoulay, R.; Clei, A.

doi:10.1109/iciprm.1993.380596

Cited by 2 publications

(1 citation statement)

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“…the thicker the buffer layer is. the lower is the density of acceptor compensating centers in n-type GaAs epilayers grown on InP (8).As a consequence, compensation phenomenon and lattice-mismatch are certainly intimately correlated. Our aim through this work is to understand how this compensation effect acts and occurs.…”

Section: Introductionmentioning

confidence: 99%

Electrical and optical characterization of n-GaAs grown by MOCVD on semi-insulating InP and application to defect studies on MESFETs devices

Hamida

Brémond

Pérez

et al.

1993 (5th) International Conference on Indium Phosphide and Related Materials

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The non lattice-matched heteroepitaxy of GaAs on InP materials is a very attractive approach to device technology because of the potential advantages of combining these two prominent band-gap semiconductors in microaptoelectronic devices.Fast GaAs Metal-Semiconductor-Field-Effect-Tmsktors (MESFETs) on InP exhibiting promising performances comparable to those grown on GaAs substrates have been already fabricated( 1,2,3). Moreover, as successfully demonstrated (4.5) the combination of GaAs and InP allows the development of performant optoelectronic-integrated circuits in the range of 1 . 3~ and 1 . 5~. The lattice-mismatch of 4% between GaAs and InP did not preclude device fabrication, althyvh 9 charifjteri2tion of such materials has shown the existence of a high density of dislocations (10 cm to 10 cm at the heterointerface (6)) and a residual biaxial tensile strain due to the difference between the thermoelastic properties of the two materials (7). The above mentionned growth difficulties are very detrimental for device applications and mainly for minority carrier based ones since they kill their lifetime. A compensation phenomenon on GaAs/InP samples is observed. if compared to GaAs homoepitaxial layers( 1). Moreover. the thicker the buffer layer is. the lower is the density of acceptor compensating centers in n-type GaAs epilayers grown on InP (8).As a consequence, compensation phenomenon and lattice-mismatch are certainly intimately correlated. Our aim through this work is to understand how this compensation effect acts and occurs. Is it a direct-interaction due to electrically active defects induced by the lattice mismatch or is it an indirect process ? The indirect process could be due to a different incorporation of Si that moves from a SiGa site to a SiAs site or forms a complex defect acting as an acceptor compensating center. Another purpose of our work is to find the consequence of these growth intrinsic defects on MESFETs devices.In this context, we have studied GaAs layers grown by MOCVD (metal-organic chemical vapour deposition) on semi-insulatin (SI) InP substrates, using deep level transient spectroscopy (DLTS) and photoluminescence (PLf techniques. We also characterized MESFET devices by gate-source capacitance DLTS. I1 MATERIALS AND EXPERIMENTSThe samples studied were grown using a two step procedure MOCVD technique on Fe-doped semi-insulating InP substrates (l).Temperature growth was 750°C. The samples were Si doped. A 3p.m GaAs epilayer on InP substr t wi and a 2x10 cm doped 4p.m maximum thick bevelled sample have been characterized.MESFET devices studied were made of a SI substrate on of w ich were grown a GaAs buffer layer and a 3.5 x l0"lPi cm-$Si-doped 300 nm GaAs wide channel. their recessed gate was 150 pm long.The buffer layers were 1 p and 2pm thick (respectively devices GIN 96 and GIN 95). We studied two series of FET devices. In the first, the layers were not annealed while in the second, the materials were submitted to Rapid Thermal Annealing (RTA) process at 900°C for 5 seconds unde...

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Section: Introductionmentioning

confidence: 99%