Optimization strategy of numerical simulations applied to EPFL substrate model

Stefanucci, Camillo; Buccella, Pietro; Kayal, Maher; Sallese, J.-M.

doi:10.1109/mixdes.2014.6872212

Cited by 3 publications

(4 citation statements)

References 8 publications

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“…The entire CAD framework is developed by using "OpenAccess" [9] open source API. As reported in [6], the accuracy of substratenoise modeling is strongly dependent on the number of extracted parasitic components and its impact on the simulation time. At this first trial, we assume that minimal number of components is generated since the meshing is chosen to be minimal.…”

Section: Cad Tool For Substrate Simulationmentioning

confidence: 99%

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Substrate noise modeling with dedicated CAD framework for smart power ICs

Zeng

Moursy

Iskander

et al. 2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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International audienceIn smart power IC technology, low and high voltage circuits are integrated on the same substrate. The commutation of the high voltage circuits can induce substrate parasitic currents which can severely disturb the operation of the low voltage circuits. The parasitic currents due to minority carriers in the high voltage technology can be significantly high. However, the minority carrier propagation into the substrate is not considered in most of existing circuit simulators. In this paper, a novel computer-aided design tool for substrate parasitic extraction is proposed. A simple circuit with an injecting and a collecting N-wells over a P-substrate is studied. With the distance between the wells varying, the lateral bipolar effect is illustrated. The spectre simulation results of extracted substrate equivalent circuit are compared to a TCAD simulation results. The comparison shows an acceptable relevant error. However, the simulation time was reduced by approximately 1400 times with respect to the TCAD

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Section: Cad Tool For Substrate Simulationmentioning

confidence: 99%

“…Technology Computer-Aided-Design (TCAD) [5] tools are the only tools available to interpret the impact of minority carriers. Despite physical based computer simulation are accurate, these are yet timeconsuming [6].…”

Section: Introductionmentioning

confidence: 99%

Substrate noise modeling with dedicated CAD framework for smart power ICs

Zeng

Moursy

Iskander

et al. 2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…The accuracy of the compact parasitic substrate model depends on the number of instantiated lumped elements in the extracted 3D substrate network. More lumped elements increase simulation time but remains significantly faster than TCAD simulation [7].…”

Section: Compact Substrate Modelmentioning

confidence: 99%

A CAD integrated solution of substrate modeling for industrial IC design

Zeng

Moursy

Iskander

et al. 2015

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)

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Smart Power IC integrating high voltage devices with low voltage control blocks becomes more and more popular in automotive industry recently. Minority carriers injected into the substrate during switching of high power stages cause malfunction of sensitive nearby low voltage devices. Sometimes this may be destructive due to the presence of triggered latch up. The minority carriers propagation is extremely hard to model and difficult to predict using existing commercial standard design flow. In this paper, we propose a Computer-Aided-Design solution to characterise the substrate vertical and lateral parasitic for Smart Power IC in automotive applications. Investigation of complex benchmark structures is presented. SPICE simulations are performed for extracted 3D substrate netlist and compared to measurements. Good fitting between simulation and measurement validates the effectiveness and accuracy of the proposed CAD tool.

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“…A physically based TCAD simulators are available. They are accurate and considered as powerful tools to model the minority carriers diffusion [8]. For large-scale IC involving hundreds of high voltage devices, TCAD becomes very limited due to the amount of components, the time consuming FEM simulation, and the complexity of layout and placement of devices.…”

Section: Introductionmentioning

confidence: 99%

A novel CAD framework for substrate modeling

Zeng¹,

Moursy²,

Iskander³

et al. 2014

2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

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International audience—This paper presents a novel Computer-Aided-Design (CAD) framework for 3D extraction of the substrate electrical network. The proposed CAD tool (framework) models effi-ciently the minority carrier propagation inside substrate network especially for smart power ICs. Today, the minority carrier propagation into the substrate is ignored in existing SPICE simulators. It can be simulated using finite element methods in TCAD. Generally, TCAD simulations are accurates but take long time. Thus, they become of limited help for large scale ICs involving hundreds of transistors. In the context of the FP7 AUTOMICS project, the extraction tool will take into consideration the minority carriers effects. It will allow the designer to predict the minority carrier propagation through the substrate. This can be useful in evaluation the efficiency of ESD protection and latchup faults due to this leackage current in the substrate specially in HV/HT applications. With the proposed substrate network, the three-dimensional layout parasitics are constructed and substrate noise is simulated before first silicon fabrication. A simple diode example is illustrated to demonstrate the principal idea of the extraction tool

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Optimization strategy of numerical simulations applied to EPFL substrate model

Cited by 3 publications

References 8 publications

Substrate noise modeling with dedicated CAD framework for smart power ICs

Substrate noise modeling with dedicated CAD framework for smart power ICs

A CAD integrated solution of substrate modeling for industrial IC design

A novel CAD framework for substrate modeling

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