Optimized InAlAs graded buffer and tensile-strained dislocation filter layer for high quality InAs photodetector grown on Si

Abstract

We demonstrate a low threading dislocation density (TDD) and smooth surface InAs layer epitaxially grown on Si by suppressing phase separation of InxAl1−xAs (x = 0 to 1) graded buffer and by inserting a tensile-strained In0.95Al0.05As dislocation filter layer. While keeping the total III–V layer below 2.7 μm to avoid thermal cracks, we have achieved a sixfold reduction of TDD in InAs on Si compared to the unoptimized structure. We found a strong correlation between the metamorphic InAs surface roughness and TDD as a function of InxAl1−xAs buffer thickness. An optimal thickness of 175 nm was obtained where both phase separation and 3D islanding growth were suppressed. Moreover, a tensile-strained In0.95Al0.05As dislocation filter layer and high growth temperature of the InAs cap layer further assisted the dislocation reduction process, which led to a TDD to 1.37 × 108 cm−2. Finally, an InAs p-i-n photodetector grown on the optimized InAs/Si template confirmed its high quality by showing an improved responsivity from 0.16 to 0.32 A/W at a 2 μm wavelength.

High-Performance Flexible InAs Thin-Film Photodetector Arrays with Heteroepitaxial Growth Using an Abruptly Graded InxAl1–xAs Buffer

“…We achieved TDDs of 3.9 × 10 7 and 2.1 × 10 7 cm –2 for Samples A and B, respectively, after surveying more than 40 μm 2 each. In our previous study, we learned that a low TDD InAs metamorphic layer can be obtained by avoiding both phase separation and 3D islanding growth in the In x Al 1– x As graded buffer . Furthermore, we found out from this experiment that the TDD of Sample B was lower than that of Sample A by 46%, indicating that the abruptly graded In x Al 1– x As graded buffer was more effective in filtering TDs than the linear grading buffer (see the Supporting Information).…”

“…The schematic diagram in Figure a illustrates the heteroepitaxial lattice-mismatched InAs device structure on the GaAs substrate. In contrast to the GaAs/AlAs/GaAs ELO structure, an In x Al 1– x As graded buffer was needed to bridge the large lattice mismatch (∼7.2%) between InAs and GaAs as well as to reduce the TDD in the InAs device layer . Sample A was grown with a typical linearly graded In x Al 1– x As buffer on an AlAs sacrificial layer as shown in Figure b.…”

“…In contrast to the GaAs/AlAs/GaAs ELO structure, an In x Al 1−x As graded buffer was needed to bridge the large lattice mismatch (∼7.2%) between InAs and GaAs as well as to reduce the TDD in the InAs device layer. 22 Sample A was grown with a typical linearly graded In x Al 1−x As buffer on an AlAs sacrificial layer as shown in Figure 1b. We have increased the In flux from 0.1 to 1.8 Å/s, while the Al flux was decreased from 1.8 to 0.1 Å/s simultaneously.…”

“…For example, the heteroepitaxial growth of InAs ( E g = 0.36 eV) or InSb ( E g = 0.17 eV) on GaAs suffers from the extremely large lattice mismatch to GaAs, ∼7.2 and 14.6%, and this results in high threading dislocation density (TDD). Therefore, the growth of sophisticated buffer layers to reduce the TDD needs to be done for maintaining high performance while simultaneously allowing the ELO process via HF solution for flexible infrared III–V-based PD arrays for various emerging applications. − …”

Growth and Fabrication of GaAs Thin-Film Solar Cells on a Si Substrate via Hetero Epitaxial Lift-Off

“…Growth of III-V materials on Si, however, creates several hurdles to overcome, such as large lattice mismatch, polar/non-polar growth, and thermal cracks [12][13][14][15][16]. The large lattice mismatch issue can be mitigated via dislocation filter layers, thermal cycle annealing, and two-step growth, while the polarity mismatch can be addressed by using an offcut Si wafer [17][18][19][20][21][22].…”