Optimized Parallel Implementation of Face Detection Based on Embedded Heterogeneous Many-Core Architecture

Abstract

Computing performance is one of the key problems in embedded systems for high-resolution face detection applications. To improve the computing performance of embedded high-resolution face detection systems, a novel parallel implementation of embedded face detection system was established based on a low power CPU-Accelerator heterogeneous many-core architecture. First, a basic CPU version of face detection prototype was implemented based on the cascade classifier and Local Binary Patterns operator. Second, the prototype was extended to a specified embedded parallel computing platform that is called Parallella and consists of Xilinx Zynq and Adapteva Epiphany. Third, the face detection algorithm was optimized to adapt to the Parallella architecture to improve the detection speed and the utilization of computing resources. Finally, a face detection experiment was conducted to evaluate the computing performance of the proposal in this paper. The experimental results show that the proposed implementation obtained a very consistent accuracy as that of the dual-core ARM, and achieved 7.8 times speedup than that of the dual-core ARM. Experiment results prove that the proposed implementation has significant advantages on computing performance.

Lightweight Blockchain Processing. Case Study: Scanned Document Tracking on Tezos Blockchain

“…Compared to GPU, FPGA is certainly less efficient, but its energy consumption is lower. The use of a heterogeneous architecture based on parallel processors with a hardware IP was presented in [24]. The application is implemented on a multi-core Zynq platform using dual ARM processors.…”

Real-Time and Energy-Efficient Face Detection on CPU-GPU Heterogeneous Embedded Platforms

“…All of these works accelerated Haar-like face detection algorithm using server GPUs or FPGA. Recently, Gao et al [10] presented a parallel implementation of LBP based face detection on an embedded platform called Parallela that consists of Zynq and Epiphany. By offloading the classification task onto Epiphany manycore device with some data prefetching, they achieved 4.3 FPS for FHD images, which corresponds to 3.8 times of speedup compared to OpenCV's CPU implementation.…”

Uma avaliação experimental da plataforma parallella utilizando controle preditivo baseado em modelo como um estudo de caso

“…Em outros trabalhos que também fazem uso da Parallella, como em [84] (em que se implementou um acelerador em software para unidades de controle inteligentes de conversores de frequência utilizados em smart grids) e em [22] (com a implementação de um algoritmo de detecção de faces), foram alcançados speedups de 1,78 e 7,8 respectivamente. Tais valores, assim como o speedup alcançado no presente trabalho, ainda estão distantes dos valores encontrados com aceleração via hardware (principalmente com FPGA's).…”

“…Dentre estes últimos, as áreas de aplicação variam entre visão computacional [21], processamento de imagens [22], processamento de sinais [23], Deep Learning [24], Redes Neurais Artificiais (RNA) [25], algoritmos bio-inspirados [26], UAN's (Unmanned Aerial Vehicle) [27], IoT (do inglês, Internet of Things) [28], segurança da informação [29], dentre outros.…”

“…Em se tratando do uso da plataforma Parallella para a área de controle, são encontradas poucas referências na literatura, indicando que este ainda é um ramo pouco explorado para esta arquitetura em questão. Por exemplo, trabalhos como [21] utilizam a placa Parallella na implementação do controle central de um robô humanoide, enquanto que em [22] tal plataforma é utilizada para a proposição de uma implementação de controle baseado em regras fuzzy.…”