Optimized scheme for power-of-two coefficient approximation for low power decimation filters in sigma delta ADCs

Shahein, Ahmed; Becker, Markus M.; Lotze, Niklas; Ortmanns, Maurits; Manoli, Yiannos

doi:10.1109/mwscas.2008.4616917

Cited by 4 publications

(2 citation statements)

References 11 publications

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“…The allocation schemes are based on: Sensitivity [2], [19], Deviation [26], and Cost as depicted in (5), (6), and (7) respectively. The allocation scheme based on sensitivity will sort the discrete coefficients in the searching space in ascending order, i.e., from the least to higher sensitive coefficients.…”

Section: B Allocation Schemementioning

confidence: 99%

A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization

Shahein

Zhang

Lotze

et al. 2012

IEEE Trans. Circuits Syst. I

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This work presents a formulation of the FIR filter problem with sum of power-of-two (POT) coefficients as a mixed integer linear problem and solves it heuristically. The optimization problem is formulated to minimize the number of nonzero bits in each coefficient without violating the filter specifications within the pass and stop bands. A novel fast and efficient local search optimization algorithm for the filter coefficients is proposed. The algorithm called POTx does not use a tree structure in contrast to conventional MILP algorithms and offers fast computation because of a presorted search space, a monotonic dedicated search space, and the use of abort conditions. The proposed approach achieves comparable reductions to nonheuristic approaches because of a hybrid allocation scheme and multiple optimization iterations. The usefulness of the proposed algorithm for low power design of FIR filters is shown through the evaluation of several benchmark filters.Index Terms-Canonic signed digit (CSD), finite impulse response (FIR), hybrid searching space, low power, mixed integer linear programming (MILP), monotonicity, power-of-two (POT).

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Section: B Allocation Schemementioning

confidence: 99%

A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization

Shahein

Zhang

Lotze

et al. 2012

IEEE Trans. Circuits Syst. I

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“…It is more efficient to implement the sample rate reduction in a series of decimation filter stages than using a single decimation stage [10]. The decimation filter stage topology has been designed and optimized using the MATLAB multistage decimation (MSD) toolbox [15]. The MSD toolbox optimizes the number of decimation stages, the decimation factor at each stage, and the filter coefficients.…”

Section: Decimation Filtersmentioning

confidence: 99%

A Power-Efficient Tunable Narrow-Band Digital Front End for Bandpass Sigma–Delta ADCs in Digital FM Receivers

Shahein

Afifi

Becker

et al. 2010

IEEE Trans. Circuits Syst. II

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A power-efficient narrow-band tunable digital front end (DFE) for bandpass sigma-delta (ΣΔ) analog-to-digital converters is presented. The proposed architecture introduces a new system topology, splitting the down converter into two mixers and placing a cascaded integrator-comb decimation stage between the two mixers. The first mixer is a quadrature mixer that works at a quarter of the sampling frequency. It is followed by a complex mixer with a tunable frequency. The ΣΔ modulator and the DFE are digitally controlled. The proposed architecture is first analyzed on the system level and then synthesized in a 130-nm CMOS technology. A reduction in the power consumption of about 50% has been achieved by the proposed architecture when compared with the conventional approach.Index Terms-Cascaded integrator comb (CIC), digital front end (DFE), frequency modulation (FM), low power, polyphase decimator, tunable.

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Ultra low energy design exploration of digital decimation filters in 65nm dual-VT CMOS in the sub-VT domain

Sherazi¹,

Rodrigues²,

Akgun³

et al. 2013

Microprocessors and Microsystems

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Optimized scheme for power-of-two coefficient approximation for low power decimation filters in sigma delta ADCs

Cited by 4 publications

References 11 publications

A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization

A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization

A Power-Efficient Tunable Narrow-Band Digital Front End for Bandpass Sigma–Delta ADCs in Digital FM Receivers

Ultra low energy design exploration of digital decimation filters in 65nm dual-VT CMOS in the sub-VT domain

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