Optimizing the Vacuum Growth of Epitaxial Graphene on 6H-SiC

Abstract

Multilayer epitaxial graphene has been grown on the Si-face of 6H-SiC on-axis commercial substrates under high vacuum conditions and at growth temperatures up to 1900 °C, utilizing the standard sublimation growth technique and a modified SiC rapid thermal annealing system which allows for excellent control of heating and cooling ramp rates. The peak growth temperature and total growth time during the graphene growth step, along with the temperature of the initial substrate etch step, were all systematically varied in order to ascertain their effect on the formation of epitaxial graphene films on the SiC surface. Modifying the substrate etch temperature was found to have a significant impact on the morphology of the SiC substrate, with a uniform step structure only developing across the surface within a narrow temperature band. Furthermore, changing the values of the peak temperature or the growth time during the growth step were both shown to have a large effect on the resultant materials properties of the graphene films.

Electrical Characterization of Epitaxial Graphene Field-Effect Transistors with High-k Al₂O₃ Gate Dielectric Fabricated on SiC Substrates

“…Bilayer EG films were then grown at 1775 ⁰C under high vacuum conditions in an upgraded JIPELEC rapid thermal processor. The full details of this EG growth process are given elsewhere [2]. After growth, the quality of the EG films was characterized by Raman spectroscopy using a Horiba Yvon LabRam HR system utilizing a 514.5 nm laser with a 700 nm spot size, while the surface morphology of both the films and the underlying SiC substrate were probed by Atomic Force Microscopy (AFM) using a Park Systems XE-150 operated in non-contact mode, as well as by Scanning Tunneling Microscopy (STM) in a Omicron VT-SPM system operating in UHV conditions with a base pressure of 5 × 10 -10 mbar.…”

Dirac point and transconductance of top-gated graphene field-effect transistors operating at elevated temperature

“…The full details of this EG growth process and EG material characterization are given elsewhere. 14 To fabricate top-gated GFETs and test devices, patterning of the EG films was first performed by using reactive ion etching (RIE) in an oxygen plasma with an Al mask. This was followed by Al mask removal in AZ-326 MIF developer and rinsing in deionised water.…”