2007
DOI: 10.1117/12.734157
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Organic phototransistor behavior and light-accelerated bias stress

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Cited by 4 publications
(6 citation statements)
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“…It should be noted that the electrons are trapped in the shallow/deep traps of the charge storage layer and stored in the OH − and H + residues and oxygen vacancies in the charge-trapping layer. [37][38][39] The enhancement of the memory window in the UV-only NVM device shows that short-term UV treatment increases the number of oxygen vacancies in high-K materials and improves their charge-trapping function. 40 In contrast, the memory window was reduced in the UV +RTA sample, as shown in Fig.…”
Section: Resultsmentioning
confidence: 99%
“…It should be noted that the electrons are trapped in the shallow/deep traps of the charge storage layer and stored in the OH − and H + residues and oxygen vacancies in the charge-trapping layer. [37][38][39] The enhancement of the memory window in the UV-only NVM device shows that short-term UV treatment increases the number of oxygen vacancies in high-K materials and improves their charge-trapping function. 40 In contrast, the memory window was reduced in the UV +RTA sample, as shown in Fig.…”
Section: Resultsmentioning
confidence: 99%
“…Once the Ta 2 O 5 /pentacene interface forms, the electron trapping sites play a key role in the device performance. Our recent research based on Ta 2 O 5 and Zan’s group and Debucquoy’s group has demonstrated that the interface between the semiconductor and the gate dielectric has a great effect on OPTM performance. ,, UV/ozone treatment is a facile method to tune the properties of Ta 2 O 5 and the interface states. It is meaningful for the understanding of the possible mechanisms.…”
Section: Introductionmentioning
confidence: 99%
“…In previous studies, the threshold voltage shift and hysteresis were usually observed under illumination. These influences can be attributed to electron trapping in the interface between gate dielectric and active layer [1,2,3]. Using the different interfacial trap densities of devices obtained from different gate dielectric treatments, electron trapping in the interface was demonstrated.…”
Section: Introductionmentioning
confidence: 99%