Output Capacitance Loss Characterization of Silicon Carbide Schottky Diodes

Tong, Zikang; Zulauf, Grayson; Xu, Jiale; Plummer, J.D.; Rivas-Davila, Juan

doi:10.1109/jestpe.2019.2904290

Cited by 29 publications

(11 citation statements)

References 18 publications

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“…Sawyer-Tower (ST) is a typical electrical measurement method used to evaluate large-signal output capacitance of transistors and diodes [10], [11]. In this method, the gate and source of the transistor are shorted to turn OFF the device, and a high-amplitude sinusoidal waveform is applied to the series connection of the device under test (DUT) and a reference linear capacitor (CREF).…”

Section: Introductionmentioning

confidence: 99%

Measurement of Large-Signal C _OSS and C _OSS Losses of Transistors Based on Nonlinear Resonance

Nikoo

Jafari

Perera

et al. 2020

IEEE Trans. Power Electron.

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In this letter, we present a new measurement technique to evaluate the large-signal output capacitance (COSS) of transistors as well as the COSS energy dissipation (EDISS), based on the nonlinear resonance between a known inductor and the output capacitance of the device under test. The method is simple and robust, and only requires a single voltage measurement to extract the large-signal COSS both in charging and discharging transients. By changing the circuit parameters, it is possible to tune the resonance frequency (even above 40 MHz) and the voltage swing (even above 1 kV) with dv/dt exceeding 100 V/ns, even though the method relies only on a low-voltage DC source, without the need for high-voltage RF amplifiers. The single-pulse operation of the method enables measuring COSS and EDISS at very high frequency and dv/dt values without any thermal runaway. Using the proposed method, we extracted large-signal COSS and EDISS of power transistors based on different semiconductor technologies. The obtained results were verified by Sawyer-Tower method and data reported in the literature. The precise characterization of large-signal COSS of transistors presented in this letter is essential for the design of power converters, especially those operating at high switching frequencies.

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Section: Introductionmentioning

confidence: 99%

Measurement of Large-Signal C _OSS and C _OSS Losses of Transistors Based on Nonlinear Resonance

Nikoo

Jafari

Perera

et al. 2020

IEEE Trans. Power Electron.

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“…Modern datasheets also provide energy stored in the COSS with increasing drain-tosource voltage (vDS). The COSS stored energy can also be computed by integrating COSS (vDS)‧vDS product from zero to a chosen VDS value [8]. Additionally, the manufacturers also provide effective capacitances in their datasheets.…”

Section: Introductionmentioning

confidence: 99%

A Simple Equation for the Energy Stored by Voltage-Dependent Capacitances

Jadli

Mohd-Yasin

Moghadam

et al. 2020

IEEE Trans. Power Electron.

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The parasitic capacitances of semiconductor power devices that contribute to the switching losses are voltagedependent, which can make calculations of their stored energy difficult. Typically, manufacturers will provide effective capacitance values to aid in circuit design and component selection. However, stored energy calculations using these effective capacitor values are erroneous. In this paper, we derive a new equation for the stored energy in the voltage-dependent capacitance associated with a semiconductor depletion region, such as in diodes and transistors. In particular, we show that the ½ term in ½CV 2 should be replaced by a new term γ, which depends on the device structure. By applying our proposed method to several commercial diodes and transistors, we show that it matches the measured data much better than using the effective capacitances. The proposed equation will enable better power circuit design by improving the accuracy of stored energy calculations. 1

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“…The Sawyer-Tower circuit is based on the fundamental assumption that the current through C ref and the device's C o are always equal in steady-state, meaning that there is no reverse conduction (third-quadrant operation) of the DUT [15], [20]. Our investigations show that this does not hold true for all the design/operating conditions.…”

Section: F Reverse Conduction Of the Dutmentioning

confidence: 78%

“…The Sawyer-Tower technique has traditionally been used for ferroelectric dielectric material characterization [19]; and now has been adapted to characterize large-signal C o of Si, Si-SJ, SiC and GaN power transistors [16]- [18], [20], and very recently of SiC power diodes [15]. It initially obtains the device's output charge characteristic (Q o vs v DS ) by applying a large excitation voltage, and subsequently, C o is obtained by taking the derivative of Q o with respect to v DS .…”

Section: B Measurement Techniques Of Large-signal C O and Q Omentioning

confidence: 99%

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Analysis of Large-Signal Output Capacitance of Transistors Using Sawyer–Tower Circuit

Perera

Kampitsis

Erp

et al. 2021

IEEE J. Emerg. Sel. Topics Power Electron.

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A detailed analysis on the Sawyer-Tower method used in the measurement of large-signal output capacitance (Co) of power transistors is presented, followed by important design recommendations to obtain accurate results. Key factors affecting the proper implementation of the technique, such as power amplifier characteristics, load slew-rate, reference capacitor (C ref) and reverse conduction of the device are addressed, with accompanying simulation and experimental results for Si, SiC and GaN devices. A thorough investigation on the selection of C ref is presented, with a new equation to correctly determine its value for a given voltage swing and output capacitance range of the Device Under Test (DUT). We report that the Sawyer-Tower circuit impose the DUT to enter steady-state reverse conduction under certain conditions, leading to charge-voltage (QV) hysteresis patterns unrelated to Co. Our analysis reveals that the origin of this phenomenon is related to DUT's leakage current, and that it could be minimized by proper selection of the excitation frequency. This work intends to provide an effective guide on designing and using the Sawyer-Tower circuit and to induce further scientific insight in characterizing Co.

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Output Capacitance Loss Characterization of Silicon Carbide Schottky Diodes

Cited by 29 publications

References 18 publications

Measurement of Large-Signal C _OSS and C _OSS Losses of Transistors Based on Nonlinear Resonance

Measurement of Large-Signal C _OSS and C _OSS Losses of Transistors Based on Nonlinear Resonance

A Simple Equation for the Energy Stored by Voltage-Dependent Capacitances

Analysis of Large-Signal Output Capacitance of Transistors Using Sawyer–Tower Circuit

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Output Capacitance Loss Characterization of Silicon Carbide Schottky Diodes

Cited by 29 publications

References 18 publications

Measurement of Large-Signal C OSS and C OSS Losses of Transistors Based on Nonlinear Resonance

Measurement of Large-Signal C OSS and C OSS Losses of Transistors Based on Nonlinear Resonance

A Simple Equation for the Energy Stored by Voltage-Dependent Capacitances

Analysis of Large-Signal Output Capacitance of Transistors Using Sawyer–Tower Circuit

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Product

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Measurement of Large-Signal C _OSS and C _OSS Losses of Transistors Based on Nonlinear Resonance

Measurement of Large-Signal C _OSS and C _OSS Losses of Transistors Based on Nonlinear Resonance