Oversampling Techniques to Improve the Accuracy of Hardware-in-the-Loop Switching Models

Yushkova, Marina; Sanchez, Alberto; Castro, Ángel de

doi:10.1109/tpel.2023.3243702

Cited by 7 publications

(6 citation statements)

References 23 publications

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“…One of the future work ideas can be including the CNN into an FPGA HIL model to detect subharmonics in a real time simulation. Depending of the subharmonics appearance in closed loop, the CNN output would define if it is necessary to apply an algorithm for their removal (like GDS oversampling used by Typhoon HIL [18], or input oversampling proposed by the authors in [16]). Disabling oversampling when there is no need for it can reduce the simulation step -which implies better accuracy -, since when oversampling is enabled, the calculation delay increases.…”

Section: Training Results and Discussionmentioning

confidence: 99%

“…In that case, aliasing occurs when the control signal in the input of the model is read inaccurately provoking undesirable subharmonics in the output. While different approaches from academia and industry (such as reduction of the simulation step [15], parallel oversampling [16], integration oversampling [17], gate drive signal (GDS) oversamling [18,19]) can be applied to solve the problem, an automatic detection of the subharmonics has not previously been proposed. We present an effective CNN application to automatizing tracing of the oscillations in HIL models.…”

Section: Introductionmentioning

confidence: 99%

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Convolutional neural network for subharmonics detection in Hardware-In-the-Loop

Yushkova,

Zambreno,

Sanchez

et al. 2023

Preprint

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Hardware-In-the-Loop (HIL) has become a popular technique for testing real-time complex systems.One of its possible applications is power converter modeling in order to test digital controllers.When a switching converter model is used, the output of the controller can be read incorrectly by the model due to the lack of synchronization of their clocks.Therefore, undesirable oscillations (subharmonics) can appear in the output due to the aliasing effects, which prevent the HIL model from its normal functionality.While there are various solutions present in academic and industrial research in order to address this arising problem, there is no automatic algorithm to detect it when a reference model is not available. In this paper, we implement a one-dimensional convolutional neural network which allows detecting the aliasing distortions.The 1D network was chosen due to the kind of the signal to be classified - an inductor current of the converter model, which is in effect a 1D time sequence.The proposed CNN architecture is shallow and consists of 27 layers only.Despite its simplicity, it shows remarkable performance of more than 99% for both validation and testing datasets, and for the post-training characteristics.Moreover, it makes the architecture potentially implementable in embedded systems, like a real-time HIL system, what can be a good objective for future research.

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Section: Training Results and Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Convolutional neural network for subharmonics detection in Hardware-In-the-Loop

Yushkova,

Zambreno,

Sanchez

et al. 2023

Preprint

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“…2. The operation-specific SNR computation method provides a more technical approach [7][8][9]. This method computes the SNR for each operation and employs a brute-force strategy to explore all potential results within a given range [19][20].…”

Section: E Comprehensive Comparisonmentioning

confidence: 99%

“…In recent years, thanks to the development of power semiconductors, the switching frequency of power converters has become increasingly higher [7]. Consequently, real-time simulation of these systems requires sub-microsecond time steps to obtain gate signals and output precise results accurately [8]. Such small-time steps have prompted a shift in real-time simulation from CPU-based hardware to FPGA-based implementation, as it offers ultra-low transmission latency and high-speed computing capabilities [9].…”

Section: Introductionmentioning

confidence: 99%

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

Zhao,

Du,

Deng

et al. 2023

IEEE Access

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Power converters become increasingly important in the power industry. To enhance design reliability and efficiency, real-time simulation is a popular method for testing control units of these devices. FPGA-based real-time simulation is considered a genuine alternative to CPU-based applications as control unit frequencies increase. Although automated tools can map simulation methods from floating-point highlevel languages to fixed-point FPGA, manually selecting the fixed-point word length to meet precision requirements involves a significant amount of tedious and repetitive work. Word length selection also impacts FPGA hardware resource usage. This paper proposes an adaptive word length selection method under accuracy constraints to minimize hardware resources. The innovation lies in using error noise models to compute analytical expressions relating simulation model accuracy to word length. The adaptive word length selection process is combined with commercial high-level synthesis tools to achieve high resource optimization performance. A three-phase inverter example demonstrates the benefits of our method in calculating model accuracy and optimizing FPGA hardware resources in simulations.INDEX TERMS Real-time simulation, field-programmable gate arrays resource optimization, power converter, word-length selection.

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“…In the first category, the model detects the transition moment by oversampling the input signals and then it recalculates the state variables when a switching event occurs. Variable simulation step [11] and inter/extrapolation methods [12,13] belong to this group. While they offer higher accuracy, they also introduce greater complexity and increase the minimum possible simulation step.…”

Section: Introductionmentioning

confidence: 99%

Four-Period Integration Oversampling Method (4PIOM) for Hardware-in-the-Loop power converters with complementary switches

Zamiri

Sanchez

Castro

2023

Preprint

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This paper addresses aliasing oscillations encountered in hardware-in-the-loop (HIL) simulation caused by inaccurate duty cycle detection in high-frequency power electronic applications. Oversampling has been commonly used as a solution to detect switching events more accurately. Traditional oversampling methods use the extra information obtained by oversampling the inputs for further computations to enhance the precision of the simulation. However, these techniques increase the complexity of the model since they take into account several switch states during each simulation step. To mitigate these complexities, the Integration Oversampling Method (IOM) is introduced as a recent alternative with minimum impact on the model complexity. IOM provides a modified switching pattern that effectively prevents aliasing oscillations while maintaining a single switch-state for each simulation step. It can be implemented as an independent block between the controller and the HIL model, so it keeps the HIL model unchanged. This study highlights the limitations detected in applying IOM to the models with complementary switches, including possible undesired short circuits. To overcome these limitations, a novel oversampling method called 4PIOM is presented. 4PIOM further enhances the IOM algorithm by reducing the simulation step and sampling period. The validity of the new method is demonstrated by comparison with previous proposals and also with the same model without any oversampling. Both experimental and MATLAB simulation results prove its superior performance in attenuating the aliasing oscillations and improving the quality of the simulation.

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Oversampling Techniques to Improve the Accuracy of Hardware-in-the-Loop Switching Models

Cited by 7 publications

References 23 publications

Convolutional neural network for subharmonics detection in Hardware-In-the-Loop

Convolutional neural network for subharmonics detection in Hardware-In-the-Loop

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

Four-Period Integration Oversampling Method (4PIOM) for Hardware-in-the-Loop power converters with complementary switches

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