The electrical characteristics of bias temperature stress (BTS) induced in amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) were studied. We analyzed the threshold voltage (V TH ) shift on the basis of the effects of positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), and applied it to the stretched-exponential model. Both stress temperature and bias are considered as important factors in the electrical instabilities of a-IGZO TFTs, and the stretched-exponential equation is well fitted to the stress condition. V TH for the drain current-gate voltage (I DS -V GS ) curve and flat-band voltage (V FB ) for the capacitance-voltage (C-V) curve move in the positive direction when PBTS is induced. However, in the case of NBTS, they move slightly in the negative direction. To clarify the V TH shift phenomenon by electron and hole injection, the average effective energy barrier (E τ ) is extracted, and the extracted values of E τ under PBTS and NBTS are about 1.33 and 2.25 eV, respectively. The oxide trap charges (N ot ) of PBTS and NBTS calculated by C-V measurement are 4.4 ' 10 11 and 1.49 ' 10 11 cm %2 , respectively. On the other hand, the border trap charges of PBTS and NBTS are 6.7 ' 10 8 and 1.7 ' 10 9 cm %2 , respectively. This indicates that the increased interface trap charge, after PBTS is induced, captures electrons during detrap processing from the border trap to the conduction band, valence band, and interface trap.