Non-volatile memory (NVM) thin-film transistors (TFTs) with organic channels have been investigated with a ferroelectric gate material, poly(vinylidenefluoride-trifluoroethylene) [P(VDF-TrFE)] [1][2][3][4][5][6] under the basic principles from conventional Si-based ferroelectric field-effect transistors (FeFET), preparing the advent of transparent or flexible device technologies on glass and plastic substrates. Beta-phase crystalline P(VDF-TrFE) films generally have an induced remnant polarization of %10 mC cm À2 if polarized over their coercive electric field (E-field), formed through spin casting and subsequent optimum curing processes. [2,4,7] Researchers presented decent NVM properties of polymer channel NVM-TFT with P(VDF-TrFE) in their recent works: low leakage, relatively low switching voltage, [2] and a quite high switching speed. [1,2,6] They also reported the physical properties of the unit ferroelectric polymer layer. [8][9][10][11][12][13][14][15] Nonetheless, a challenging problem remains to be overcome prior to any practical application of this ferroelectric polymer towards NVM-TFT on flexible plastic or glass substrates: it is the inferior field mobility (less than %10 À2 cm 2 V À1 s À1) of present polymer-based NVM-TFTs, which is due to the intrinsic low channel mobility of polymer-based semiconductors and also due to the rough surface of spin-cast P(VDF-TrFE) layers. Moreover, obtaining low leakage current from spin-cast crystalline ferroelectric polymer films may require quite sensitive care [2] in the solvent selection and in the coating processes of purified polymers. Our previous report shows some high mobility (0.36 cm 2 V À1 s À1 ) ZnO-based NVM-TFTs with poly-4-vinylphenol (PVP)/P(VDF-TrFE) double layers, where the PVP overlayer suppressed current leakage of P(VDF-TrFE) but also caused poor retention, inducing depolarization electric field in the ferroelectric P(VDF-TrFE) layers.[16] Here, we adopt a single P(VDF-TrFE) layer of short-range-order crystalline phase as the nonvolatile memory component for a reproducible lowcurrent-leakage ferroelectric, to be applied onto high-mobility p-channel pentacene channels on flexible plastic substrates and also onto high-mobility n-channel ZnO channels on glass. Our limited-crystalline ferroelectric layer still showed good remnant polarization of maximum %7 mC cm À2, and the pentacene-and ZnO-based NVM-TFTs with such short-range-order crystalline P(VDF-TrFE) layer reproducibly demonstrated maximum field mobilities of 0.1 and 1 cm 2 V À1 s À1 , respectively, with low leakage current densities of a few nanoamperes (%1 Â 10 À6 A cm À2 ), low switching voltages of %20 V for write/erase (in 50 ms pulse), low operation (after switching) voltages of %5 V, and long retention of over 10000 s. In particular, our ZnO-based NVM-TFTs displayed a large memory window of 20 V, which is the maximum obtainable from 200 nm-thick P(VDF-TrFE).Device cross-sections in Figure 1a display our pentacene-and ZnO-based NVM TFTs with the short-range-order crystalline P(VDF-TrFE)...

We have fabricated transparent bottom gate thin film transistors (TFTs) using Al-doped zinc tin oxide (AZTO) as active layers. The AZTO active layer was deposited by rf magnetron sputtering at room temperature. The AZTO TFT showed good TFT performance without postannealing. The field effect mobility and the subthreshold swing were improved by postannealing below 180 °C. The AZTO TFT exhibited a field effect mobility (μFET) of 10.1 cm2/V s, a turn-on voltage (Von) of 0.4 V, a subthreshold swing (S/S) of 0.6 V/decade, and an on/off ratio (Ion/Ioff) of 109.

We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al-doped zinc tin oxide (AZTO) TFT. Deposition of an ultra-thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo-resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.

This weekly schedule of irinotecan was modestly active against cisplatin-refractory gastric cancer and relatively well-tolerated with appropriate dose modification.

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