on. [1][2][3][4][5][6][7] Among these 1D nanomaterials, many novel synthesis techniques have then been developed, including chemical vapor deposition (CVD), [8][9][10] hydrothermal methods, [11][12][13] and template-assisted electrodeposition, etc; [14][15][16] however, all of these fabrication schemes come with different process-related disadvantages. For example, CVD has been widely employed for the growth of 1D semiconductor nanostructures, [17,18] in which this technique is still far from being compatible with the large-scale manufacturing platform due to the rather high fabricating cost, rigorous process control, low production throughput, and complicated subsequent device fabrication scheme. [9,19] Although hydrothermal methods are seem to be the simple process and capable to produce large amounts of 1D nanomaterials with the relatively low cost, they are challenging to precisely control the diameter, morphology, and crystal structure of the nanomaterials obtained, seriously influencing their chemical and physical properties, eventually limiting their practical utilizations. [13,20] In general, electrospinning is well accepted to its simplicity and versatility to yield organic, inorganic or composite nanofibers (NFs). [21,22] This technique can not only fabricate NFs with well-controlled properties, such as the excellent crystallinity, homogeneous chemical composition, and uniform diameters but also deliver the high throughput Although significant progress has been made towards using ZnO nanofibers (NFs) in future high-performance and low-cost electronics, they still suffer from insufficient device performance caused by substantial surface roughness (i.e., irregularity) and granular structure of the obtained NFs. Here, a simple onestep electrospinning process (i.e., without hot-press) is presented to obtain controllable ZnO NF networks to achieve high-performance, large-scale, and low-operating-power thin-film transistors. By precisely manipulating annealing temperature during NF fabrication, their crystallinity, grain size distribution, surface morphology, and corresponding device performance can be regulated reliably for enhanced transistor performances. For the optimal annealing temperature of 500 °C, the device exhibits impressive electrical characteristics, including a small positive threshold voltage (V th ) of ≈0.9 V, a low leakage current of ≈10 −12 A, and a superior on/off current ratio of ≈10 6 , corresponding to one of the best-performed ZnO NF devices reported to date. When high-κ AlO x thin films are employed as gate dielectrics, the source/drain voltage (V DS ) can be substantially reduced by 10× to a range of only 0-3 V, along with a 10× improvement in mobility to a respectable value of 0.2 cm 2 V −1 s −1 . These results indicate the potential of these nanofibers for use in next-generation low-power devices.
Thin-Film Transistors