P‐139L: Late‐News Poster: AC Gate‐Drain‐Bias Stress Study of amorphous Indium Gallium Zinc Oxide Thin Film Transistors for GOA Applications

Abstract

This paper investigates the reliability behavior of IGZO TFT with different widths under AC gate and drain stress. Device of larger width suffers from worse current degradation. By comparing the contact resistance after stress such behavior can be attributed to the damaged contact region by large current during stress. Author KeywordsReliability, voltage stress, oxide TFTs I. Objective and BackgroundRecently, amorphous indium gallium zinc oxide thin film transistors (a-IGZO TFTs) have received wide attention due to its high mobility, uniformity and low process temperature. The other potential is fabricating gate driver on array (GOA) of TFT-LCD panel. Doing so not only reduces the difficulty and cost of bonding but also facilitates the integration of process. For this application, large size a-IGZO TFT with good stability is demanded. Semiconductor energy laboratory had reported the driver-integrated panel using a-IGZO TFT [1]. In GOA operation, the TFTs are applied with pulse gate (V G ) and drain (V D ) signals, which could cause serious degradation. Therefore, for driver-integrated TFT-LCD applications, the reliability behavior of a-IGZO TFT under AC V G and V D stress should be studied carefully. In this paper, the reliability behavior of a-IGZO under pulse V G and V D signal is investigated. The device width effect of a-IGZO TFT under such stress condition is also studied. At the end the comparison and discussion of the contact resistance before and after stress is provided.