2007
DOI: 10.1143/jjap.46.4046
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P-Channel Lateral Double-Diffused Metal–Oxide–Semiconductor Field-Effect Transistor with Split N-Type Buried Layer for High Breakdown Voltage and Low Specific On-Resistance

Abstract: Many high voltage complementary metal-oxide-semiconductor (HV-CMOS) processes are modified from a standard 5 V CMOS process by adding an N-type heavily doped layer under the P-well of a HV-PMOS drain terminal to isolate a high voltage P-well from a grounded P-substrate. The limitation of breakdown voltage is dominated by P-well concentration and junction depth. For designing a certain breakdown voltage (BV dss ) for a HV-PMOS, the original 5 V CMOS P-well concentration should be decreased, which could degrade … Show more

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“…RESURF technique (Ludikhuize, 2000) further enhances the efficiency of the device by increasing the breakdown voltage level. Other approaches could also be used for increasing the breakdown voltage and reduce the on-resistance R on , such as double RESURF technique by using internal field rings, buried layers, triple well architecture and super-junction LDMOS transistors (Hossain et al, 2002;Nezar and Salama, 1991;Liaw et al, 2007;Puchner et al, 2007;Park and Salama, 2006). In literature, one can also find thin-film single-crystal silicon LDMOS structures but they use either Silicon on Insulator (SOI) (Akarvardar et al, 2007;Luo et al, 2003;Bawedin et al, 2004) or Silicon on Sapphire (SOS) (Roig et al, 2004) technologies.…”
Section: Introductionmentioning
confidence: 99%
“…RESURF technique (Ludikhuize, 2000) further enhances the efficiency of the device by increasing the breakdown voltage level. Other approaches could also be used for increasing the breakdown voltage and reduce the on-resistance R on , such as double RESURF technique by using internal field rings, buried layers, triple well architecture and super-junction LDMOS transistors (Hossain et al, 2002;Nezar and Salama, 1991;Liaw et al, 2007;Puchner et al, 2007;Park and Salama, 2006). In literature, one can also find thin-film single-crystal silicon LDMOS structures but they use either Silicon on Insulator (SOI) (Akarvardar et al, 2007;Luo et al, 2003;Bawedin et al, 2004) or Silicon on Sapphire (SOS) (Roig et al, 2004) technologies.…”
Section: Introductionmentioning
confidence: 99%