p-Type MOSFET Contact Resistance Improvement by Conformal Plasma Doping and Nanosecond Laser Annealing

Li, C. I.; Breil, N.; Wen, Tao; Liu, S. Y.; Hsieh, M.S.; Yen, Sheng-Hung; Chang, Ching Wen; Tsai, S. H.; Gossmann, H.‐J.; Guo, B. N.; Shim, K. H.; Variam, N.; Tang, Shan; Wang, C.; Salimian, S.; Nejad, H. Baghban Asghari; Sharma, Shashank; Wen, Jianguo; Khaja, Fareen Adeni; Hollar, K.; Ng, Brenda; Nagy, Stephen; Hung, R.; Hou, M.; Chen, S.; Kuo, J.; Liao, Duanquan; Chudzik, M.; Yang, Ni; Hung, G.C.; Hsu, Sheng Chia; Wu, J. Y.

doi:10.1109/led.2019.2890950

Cited by 7 publications

(3 citation statements)

References 11 publications

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“…Although DSA is efficient for activation of the dopants by SPER, the higher fluencies of NLA suggest super-activation of the dopants, via the formation of interfacial dopant-semiconductor metastable alloys [86][87][88][89]. It is also confirmed that NLA offers ~5% benefit over the DSA annealing process [90]. Moreover, NLA is a particularly promising technique for PMOS to achieve ρ c of mid-10 −10 Ω cm 2 due to Ge segregation at the SiGe surface during the laser-induced SPER/liquid phase epitaxial regrowth process [87,89].…”

Section: Transition From B To Ga In Tisi X Ge Y /P + -Sige Contactsmentioning

confidence: 69%

Titanium-based ohmic contacts in advanced CMOS technology

Mao¹,

Luo²

2019

J. Phys. D: Appl. Phys.

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Since the contact resistance characterized by a specific contact resistivity (ρ c ) in the source/ drain (S/D) regions is becoming a bottleneck for further improving device performance, the criteria for selecting S/D contact materials, e.g. silicides, is therefore more concerned with the ρ c in state-of-the-art fin channel field-effect-transistors rather than the sheet resistance (R sh ) of silicides in conventional planar devices. In these circumstances, Ti-based ohmic contacts prevail over Ni(Pt)Si-based ones, and they serve as the standard S/D contacts in advanced complementary metal-oxide-semiconductor technology. In this article, an overview of recent innovations in Ti-based ohmic contacts, including (1) extraction of ultra-low ρ c in the sub-10 −8 Ω cm 2 regime, (2) fundamental aspects of the Ti/Si solid-state reaction, (3) the impact of Ge pre-amorphization implantation (Ge PAI) on both the formation of TiSi x /TiSi x Ge y and ρ c in the low temperature regime (⩽600 °C), (4) dopant boosting to reduce ρ c , (5) conformal Ti deposition for surrounding contacts and (6) dual silicides and metal-insulator-semiconductor contacts, are presented.

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Section: Transition From B To Ga In Tisi X Ge Y /P + -Sige Contactsmentioning

confidence: 69%

Titanium-based ohmic contacts in advanced CMOS technology

Mao¹,

Luo²

2019

J. Phys. D: Appl. Phys.

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“…Left: schematic Ge and Ga content profiles from EDS, Ga-content is scaled for better readability; right: Contact resistivity vs. Ga-fraction at the Ti/SiGe interface (18). Application to FinFET Device Structure A very similar approach was then applied to p-type finFET device (21). The simplified process flow is detailed in Figure 7 for conventional p-type finFET devices with replacement metal gate (RMG) scheme and in-situ Boron doped SiGe epi source/drain.…”

Section: Application To Patterned Structuresmentioning

confidence: 99%

(Invited) Laser Thermal Annealing for Low Thermal Budget Applications: From Contact Formation to Material Modification

et al. 2019

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Pulsed laser thermal annealing at the nanosecond timescale was successfully introduced into semiconductor devices manufacturing in the late 2000s for high volume manufacturing of sensitive 3D architectures such as vertical Si-based Insulated Gate Bipolar Transistors, SiC-based vertical power diodes and backside illuminated CMOS imaging sensors. It is now on the verge of being integrated in key annealing process steps in next generation CMOS and memory devices manufacturing. This invited paper presents recent experimental and simulation work involving sub-µs laser annealing for a wide range of applications, from contact formation to material modification and 3D sequential integration.

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“…8,24 In parallel, some reports can be found on a trial of integrating laser anneal into industrial transistors, especially to reduce the contact resistivity. 23,[25][26][27][28][29] In a real CMOS process, multilayered structures can be found everywhere. A typical one is a semiconductor material encapsulated by a dielectric thin film as found in the gate of transistor (i.e., Si gate with silicon dioxide (SiO 2 ) hard mask).…”

mentioning

confidence: 99%

Non-Equilibrium Growth of Surface Wrinkles Emerging in an SiO₂/Si Stack during Si Melting Induced by UV Nanosecond Pulsed Laser Annealing

Karmous

Rozé

Raynal³

et al. 2022

ECS J. Solid State Sci. Technol.

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UV nanosecond pulsed laser annealing (UV-NLA) is demonstrating clear benefits in emerging 3D-integrated electronic devices, where the allowed thermal budget is strictly limited to preserve underlying device performance. A possible drawback of UV-NLA is that melting a solid substrate covered by a dielectric layer, which can be found in typical electronic device structures, induces wrinkles on the surface and may be an issue for subsequent processes. In this study, UV-NLA is performed in SiO2/Si structures to systematically investigate the emergence of wrinkles. A classical analytical model shows good agreement with our experimental results if a fitting coefficient is involved. Interestingly, its value rapidly increases for a thinner SiO2 film, whereas it becomes closer to unity for a thicker SiO2 film. This might infer a possible discrepancy of the material properties taken from literature and those of real industrial thin SiO2 films. The degree of the initial SiO2 film stress being negligible compared to the SiO2 shear modulus, its impact on the growth of wrinkles is not significant in our experiment.

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p-Type MOSFET Contact Resistance Improvement by Conformal Plasma Doping and Nanosecond Laser Annealing

Cited by 7 publications

References 11 publications

Titanium-based ohmic contacts in advanced CMOS technology

Titanium-based ohmic contacts in advanced CMOS technology

(Invited) Laser Thermal Annealing for Low Thermal Budget Applications: From Contact Formation to Material Modification

Non-Equilibrium Growth of Surface Wrinkles Emerging in an SiO₂/Si Stack during Si Melting Induced by UV Nanosecond Pulsed Laser Annealing

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p-Type MOSFET Contact Resistance Improvement by Conformal Plasma Doping and Nanosecond Laser Annealing

Cited by 7 publications

References 11 publications

Titanium-based ohmic contacts in advanced CMOS technology

Titanium-based ohmic contacts in advanced CMOS technology

(Invited) Laser Thermal Annealing for Low Thermal Budget Applications: From Contact Formation to Material Modification

Non-Equilibrium Growth of Surface Wrinkles Emerging in an SiO2/Si Stack during Si Melting Induced by UV Nanosecond Pulsed Laser Annealing

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Product

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Non-Equilibrium Growth of Surface Wrinkles Emerging in an SiO₂/Si Stack during Si Melting Induced by UV Nanosecond Pulsed Laser Annealing