Parallel Architecture Benchmarking: From Embedded Computing to HPC, a FiPS Project Perspective

Lhuillier, Yves; Philippe, Jean‐Marc; Guerre, Alexandre; Kierzynka, Michał; Oleksia, Ariel

doi:10.1109/euc.2014.30

Cited by 9 publications

(10 citation statements)

References 9 publications

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“…As a real algorithm example, we used Cholesky Matrix Decomposition and, especially, the 256×64 use case. The weighted task graph presented in Figure was generated using communication analyzers from CoTS toolchain …”

Section: Numerical Resultsmentioning

confidence: 99%

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Task management on fully heterogeneous micro‐server system: Modeling and resolution strategies

Zaourar

Ait

Philippe

2018

Concurrency and Computation

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Summary Many of today's important applications of our everyday lives, eg, weather forecast, design of plane and car shapes, medical analysis, or search engine queries depend on massively parallel computer programs executed in data centers. A large amount of energy is used to power them, and it is of primary importance to compute more efficiently to sustain the increasing demand of computing power while keeping energy consumption reasonable. One promising research path in this domain is heterogeneous systems since specific computing resources (processors, accelerators, etc) are more adapted to efficiently execute parts of applications. Nevertheless, the exploitation of these platforms raises new challenges in terms of application management optimization. The aim of our work is to determine effective algorithms to exploit these heterogeneous platforms by finding appropriate application mapping and scheduling to optimize the execution time and energy consumption with respect to various constraints. To achieve this goal, there is a need of a detailed modeling of the applications and the underlying hardware to be able to find realistic solutions. In this paper, we propose such a model, provide two implementations with state‐of‐the‐art tools, and propose a fast greedy online resolution algorithm and preliminary mapping and scheduling numerical results.

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Section: Numerical Resultsmentioning

confidence: 99%

“…We present here a method for dynamically mapping and scheduling applications on heterogeneous platforms to optimize performance/watt ratio. Execution time and power consumption for each task on different PEs are provided from a database, which can be filled using values gathered from the characterization phase of the FiPS flow …”

Section: Related Workmentioning

confidence: 99%

Task management on fully heterogeneous micro‐server system: Modeling and resolution strategies

Zaourar

Ait

Philippe

2018

Concurrency and Computation

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“…We conduct our studies on the RECS systems being developed by Christmann company [5] within the EU FiPS project [7], [11]. The RECS compute box, a high density computing system with embedded power meters for each of its computing nodes, can host from 6 up to 18 servers (24 to 72 in the case of ARM-based systems) within one rack unit.…”

Section: Introductionmentioning

confidence: 99%

Modeling Impact of Power- and Thermal-Aware Fans Management on Data Center Energy Consumption

Piątek

Oleksiak

Berge

2015

Proceedings of the 2015 ACM Sixth International Conference on Future Energy Systems

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In this paper we study the power usage and thermal management of micro servers to analyze their impact on the overall data center energy consumption. We propose thermal models of micro servers based on analytical approach tuned with parameters derived from empirical tests. We demonstrate how fan management configuration affects the energy consumption of servers and the whole data center. We also apply the proposed model to predict temperature changes in a short time ahead and take advantage of these predictions to improve fan management. We show why PUE is not sufficient or can be even misleading in minimizing data center energy consumption. To mitigate this issue, we propose metrics that can be used to reflect correctly fans management impact on the overall energy consumption.

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“…The FiPS project has developed the FiPS flow [13] which enables the developer to identify kernel in a larger application that can be outsourced on different hardware architectures. The FiPS workflow automatically extracted and characterized the main kernel in the CPU version of the G-DNA application and additionally suggested FPGA as a possible and efficient architecture.…”

Section: Fpga-based Implementation and Hardware Platformmentioning

confidence: 99%

“…The main goal of the project is to develop highly heterogeneous low power servers (called RECS R |Box) for HPC centers and cloud applications, with a special emphasis placed onto FPGA modules. Alongside with the hardware, the project partners have developed tools helping the programmers to port their applications to heterogeneous environment [13]. Interestingly, the hardware is developed in close collaboration with application partners, who adapt their domain-specific software tools to achieve more energy-efficient implementations.…”

Section: Introductionmentioning

confidence: 99%

Energy efficiency of sequence alignment tools—Software and hardware perspectives

Kierzynka

Kosmann

Berge

et al. 2017

Future Generation Computer Systems

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Pairwise sequence alignment is ubiquitous in modern bioinformatics. It may be performed either explicitly, e.g. to find the most similar sequences in a database, or implicitly as a hidden building block of more complex methods, e.g. for reads mapping. The alignment algorithms have been widely investigated over the last few years, mainly with respect to their speed. However, no attention was given to their energy efficiency, which is becoming critical in high performance computing and cloud environment. We compare the energy efficiency of the most established software tools performing exact pairwise sequence alignment on various computational architectures: CPU, GPU and Intel Xeon Phi. The results show that the energy consumption may differ as much as nearly 5 times. Substantial differences are reported even for different implementations running on the same hardware. Moreover, we present an FPGA implementation of one of the tested tools -G-DNA, and show how it outperforms all the others on the energy efficiency front. Finally, some details regarding the special RECS R |Box servers used in our study are outlined. This hardware is designed and manufactured within the FiPS project by the Bielefeld University and Christmann Informationstechnik + Medien with a special purpose to deliver highly heterogeneous computational environment supporting energy efficiency and green ICT.

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Parallel Architecture Benchmarking: From Embedded Computing to HPC, a FiPS Project Perspective

Cited by 9 publications

References 9 publications

Task management on fully heterogeneous micro‐server system: Modeling and resolution strategies

Task management on fully heterogeneous micro‐server system: Modeling and resolution strategies

Modeling Impact of Power- and Thermal-Aware Fans Management on Data Center Energy Consumption

Energy efficiency of sequence alignment tools—Software and hardware perspectives

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