Parallel Discrete-Event Simulation Applications

Tropper, Carl

doi:10.1006/jpdc.2001.1794

Cited by 15 publications

(8 citation statements)

References 24 publications

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“…The simulation clock is advanced and the execution time of all other events is updated. Such a sequential procedure prevents the occurrence of ''causality errors'' by ensuring that an event with a later time stamps is not executed before an event with an earlier time stamp (Tropper, 2002). Furthermore, since the execution of certain events leads to the creation of new modules and the termination of existing ones, the number of active modules in We use a fixed-time step of 0.10 s for stepping forward in time.…”

Section: Implementation Of Simulation Frameworkmentioning

confidence: 99%

DEMSIM: a discrete event based mechanistic simulation platform for gene expression and regulation dynamics

Dasika

Gupta

Maranas

2005

Journal of Theoretical Biology

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Section: Implementation Of Simulation Frameworkmentioning

confidence: 99%

DEMSIM: a discrete event based mechanistic simulation platform for gene expression and regulation dynamics

Dasika

Gupta

Maranas

2005

Journal of Theoretical Biology

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“…In order to accommodate the growing need for increased memory as well as the need for decreased simulation time, it is becoming increasingly necessary to make use of distributed simulation [1].…”

Section: Introductionmentioning

confidence: 99%

A Multiway Design-driven Partitioning Algorithm for Distributed Verilog Simulation

Tropper

2009

SIMULATION

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Many partitioning algorithms have been proposed for distributed Very-large-scale integration (VLSI) simulation. Typically, they make use of a gate level netlist and attempt to achieve a minimal cutsize subject to a load balance constraint. The algorithm executes on a hypergraph which represents the netlist. We propose a design-driven iterative partitioning algorithm for Verilog based on module instances instead of gates. We do this in order to take advantage of the design hierarchy information contained in the modules and their instances. A Verilog instance represents one vertex in the circuit hypergraph. The vertex can be flattened into multiple vertices in the event that a load balance is not achieved by instance-based partitioning. In this case, the algorithm flattens the largest instance and moves gates between the partitions in order to improve the load balance. Our experiments show that this partitioning algorithm produces a smaller cutsize than is produced by hMetis on a gatelevel netlist. It produces better speedup for the simulation because it takes advantage of the design hierarchy.

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“…To accommodate the growing need for increased memory as well as the need for decreased simulation time, it is becoming increasingly necessary to make use of distributed simulation [12].…”

Section: Introductionmentioning

confidence: 99%

Event reconstruction in time warp

Tropper

2004

Proceedings of the Eighteenth Workshop on Parallel and Distributed Simulation - PADS '04

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In optimistic simulations, checkpointing techniques are often used to reduce the overhead caused by state saving. In this paper, we propose event reconstruction as a technique with which to reduce the overhead caused by event saving, and compare its memory consumption and execution time to the results obtained by dynamic checkpointing. As the name implies, event reconstruction reconstructs input events and anti-events from the differences between adjacent states, and does not save input events in the event queue.For simulations with fine event granularity and small state size, such as the logic simulation of VLSI circuitry, event reconstruction can yield an improvement in execution time as well as a significant reduction in memory utilization when compared to dynamic checkpointing. Moreover, this technique facilitates load migration because only the state queue needs to be moved from one processor to another.

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Parallel Discrete-Event Simulation Applications

Cited by 15 publications

References 24 publications

DEMSIM: a discrete event based mechanistic simulation platform for gene expression and regulation dynamics

DEMSIM: a discrete event based mechanistic simulation platform for gene expression and regulation dynamics

A Multiway Design-driven Partitioning Algorithm for Distributed Verilog Simulation

Event reconstruction in time warp

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