Parallel Synthesis of Nanoscale Si Superlattices through Eutectic Confinement for Semiconductor p–n Junctions

Abstract

Superlattices are complex structures comprised of periodically ordered particles, wires, or slabs. Superlattices containing nanoscale to micron-scale layers of semiconductors underpin myriad quantum device architectures, light-emitting diodes, transistors, and memory elements. Current approaches for the fabrication of such superlattices typically offer a trade-off between high quality and high throughput. Here we report a parallel process for the rapid synthesis of nanoscale Si superlattices. Bottom-up growth of the superlattices is catalyzed by eutectic liquids confined within pre-etched trenches. Electron microscopy and crystallographic analyses reveal that nanoscale, highly oriented, and single-crystal slabs of Si are grown in an en masse fashion across large substrate areas. The synthetic process is highly selective toward bottom-up growth and exhibits growth rates in excess of 500 nm/min. Serial sectioning reveals that the Si slabs are uniformly crystalline and oriented with an average defect concentration of 1.4%. Using this method, we fabricate a superlattice of nanoscale Si p–n junctions and achieve phosphor dopant levels approaching 1 × 1020 atoms/cm3. This method provides a unique opportunity for the rapid fabrication of high-quality nanoscale semiconductor superlattices and devices.

Nucleation of InP on Si under micro-crucibles at ultra-high vacuum using a two-step VLS process

“…This also means that the epilayer and the substrate have direct electrical connection, unlike lateral aspect ratio trapping in which the epilayer is grown on SiO 2 layer [17]. In addition, compared to common template-assisted selective epitaxy [18], the use of metal as a catalyst could improve the growth rate and selectivity [10][11][12]19] and reduce the growth temperature [11,12,20]. All these combined make the metal-catalyzed lateral epitaxy attractive for Si photonics where well-defined and compact InP-based photonics components need to be grown selectively on a pre-patterned Si substrate using low temperature process(es).…”