Parallel X-fault simulation with critical path tracing technique

Transition delay fault simulation with parallel critical path back-tracing and 7-valued algebra

“…However, the complexity of the computational model itself, and the related fault simulation speed depends essentially on the structure of the circuit. On the other hand, as shown in [16,17], the speed of fault simulation for different fault models (like SAFs, conditional SAFs and X-faults) by the proposed parallel critical path tracing method outperforms the speed of the fault simulators of major CAD vendors.…”

“…For this purpose we use the idea of parallel backward critical path tracing used in [16,17]. In the following, the method of SAF simulation based on this idea is shortly described.…”

“…In a general case of nested re-convergences, the formula (2) can be used recursively [16,17]. If a SAF is detected by a test pattern on the output y of a sub-circuit in Fig.…”

“…In this paper we adjust the method proposed in [17] for parallel critical path tracing of TDFs, and we extend the detection conditions for TDFs compared to that proposed in [8,9]. Both phases of TDF simulation will be carried out by critical path backward tracing, the phase of SAF analysis is carried out in parallel for many patterns simultaneously, and the TDF type analysis is carried out pattern by pattern using the 7-valued algebra developed in the paper.…”

“…Parallel critical path backward tracing in fan-out free regions combined with parallel simulation of stem faults was investigated in [15]. In [16], the concept of exact parallel critical path tracing was generalized for SAF cover analysis beyond the fan-out free regions, and in [17], the method was extended for simulation of a large fault class called X-fault.…”